S70FS01GS datasheet(70/141 Pages) CYPRESS

70 / 141 page

S70FS01GS

Document Number: 002-03833 Rev. *C

Page 70 of 141

4. ECC status may only be read from sectors that are readable. In read protection mode the addresses are forced to the

boot sector address. ECC status is only in that sector while read protection mode is active.

8.5

Recommended Protection Process

During system manufacture, the Flash device configuration should be defined by:

1. Programming the OTP configuration bits in CR1NV[5, 3:2], CR2NV, CR3NV, and CR4NV as desired.

2. Program the Secure Silicon Region (OTP area) as desired.

3. Program the PPB bits as desired via the PPBP command.

4. Program the Non-Volatile Data Learning Pattern (NVDLR) if it will be used in DDR read commands.

5. Program the Password register (PASS) if password protection will be used.

6. Program the ASP Register as desired, including the selection of the persistent or password ASP protection mode in

ASPR[2:1]. It is very important to explicitly select a protection mode so that later accidental or malicious programming of

the ASP register and OTP configuration is prevented. This is to ensure that only the intended OTP protection and

configuration features are enabled. While programming the ASPR register:

7. The RPME bit (ASPR[5]) may be used to select read password mode to use the password to control read access to most

of the array.

During system power up and boot code execution:

1. Trusted boot code can determine whether there is any need to program additional SSR (OTP area) information. If no SSR

changes are needed the FREEZE bit (CR1V[0]) can be set to 1 to protect the SSR from changes during the remainder of

normal system operation while power remains on.

2. If the persistent protection mode is in use, trusted boot code can determine whether there is any need to modify the

persistent (PPB) sector protection via the PPBP or PPBE commands. If no PPB changes are needed the PPBLOCK bit

can be cleared to 0 via the PPBL to protect the PPB bits from changes during the remainder of normal system operation

while power remains on.

3. The dynamic (DYB) sector protection bits can be written as desired via the DYBAR.

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