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AD9545

Data Sheet

Rev. A | Page 42 of 157

REFERENCE MONITOR

REFERENCE MONITOR OVERVIEW

The AD9545 has four independent reference monitors, one for

each reference input. The A block in Figure 43 shows the REFA

input along with its associated reference monitor. Figure 43

shows only the detail of the REFA input. The AA, B, and BB

blocks shown in Figure 43 are associated with the REFAA,

REFB, and REFBB input pins and are functionally equivalent to

the A block of the diagram.

The user has the option of powering down unused references

via the power-down REFx bits (where x is A, AA, B, or BB) in

Bits[D3:D0] of Register 0x2001.

Each reference input has a dedicated input divider (for example,

RA in Figure 43) with a programmable divide ratio (see the

Reference Dividers (R Dividers) section). Because the reference

monitor is follows the R-divider in the signal path, the reference

monitor essentially undersamples the reference input clock

signal for divide ratios greater than one.

Between the R divider and the reference monitor is a time-to-

digital converter (TDC) (see the Time to Digital Converter

(TDC) section). The TDC delivers digital (numeric)

timestamps to the reference monitor, which processes the

timestamps to determine the status of the input clock signal (for

example, one of the status indications is whether or not the

clock signal meets predefined frequency limits). Each reference

TDC can connect to either DPLL input via the digital cross point

mux (see Figure 1). Even when a reference is not connected to

one of the DPLLs via the cross point mux, its corresponding

reference monitor connects and continues to monitor the

reference signal to generate the appropriate status signals for

that reference.

The AD9545 uses the status of the input reference to control

certain internal functions (automatic reference switching, for

example). The user has access to the status signals via the

Status and Control Pins section and Interrupt Request (IRQ)

section for more detail).

REFA

TO DIGITAL

CROSS

POINT MUX

REFA

MONITOR

REFA FAULT

REFAA

REFB

REFBB

USER

CHANGES RA

RESET

SYSTEM

CLOCK

UNSTABLE

USER CHANGES

tREF,

ΔTOL, ΔHYS, OR JTOL

REFA SLOW

REFA FAST

REFA EXCESS JITTER

REFA VALID

REFA LOS

USER

CHANGES

INPUT MODE

PHASE

STEP

DETECTED

RESET

USER

CHANGES

tVALID

÷RA

TEXT

=BIT(S) IN THE REGISTER MAP AND/OR VIA AN Mx PIN.

START

END

REFA

VALIDATION

TIMER

OOT

REFA JITTER TOLERANCE

REFA NOMINAL PERIOD

REFA MONITOR HYSTERESIS

REFA OFFSET LIMIT

DURATION

REFA R DIVIDE RATIO

JTOL ≠ 0

SLOW

FAST

LOS

EXCESS

JITTER

tREF

JEXCESS

ΔTOL

ΔHYS

JTOL

BYPASS REFERENCE MONITOR A

BYPASS

FAULT REFA

REFA VALIDATION TIMER

TIMEOUT REFERENCE MONITOR A

TIMEOUT

tVALID

VALID

FAULT

TDC

POWER-DOWN REFA

Figure 43. Reference Monitor

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