AD9545 datasheet(12/157 Pages) AD

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AD9545

Data Sheet

Rev. A | Page 12 of 157

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

1.2 V and 1.8 V CMOS

Input Voltage

High, VIH

0.65 × VREF

1.15 × VREF

VREF is determined by operating mode of the CMOS input

receiver, 1.2 V or 1.8 V

Low, VIL

0.35 × VREF

Input Resistance

DC-Coupled Single-

Ended Mode

kΩ

AC-Coupled Single-

Ended Mode

kΩ

Input Pulse Width

900

REFERENCE

DEMODULATOR

Carrier Frequency

(Sync Edge = 1, 2, 3)

Band 0

DC Balanced

Modulation

0.5

MHz

Unbalanced

Modulation

0.5

MHz

Band 1

DC Balanced

Modulation

MHz

Unbalanced

Modulation

135

MHz

Embedded Clock Rate

fOUT/6

fOUT is the nominal output frequency of the output with the

embedded clock

Duty Cycle Deviation

tSYS = 1/(fSYS); where fSYS is the system clock frequency. fSYS must

be in the range of 2250 MHz to 2415 MHz. fSYS = fOSC × K/J,

where fOSC is the frequency of the system clock oscillator

connected to the XOA/XOB pins, K is the feedback divider

ratio, and J is the SYSCLK input scale factor. When the SYSCLK

doubler is disable, J is the value of the J-divider (1, 2, 4, or 8).

When the SYSCLK doubler is enabled, J = 1/2.

DC Balanced

Modulation

tSYS × 5/3

1/(4 × fOUT)

sec

fOUT is the output frequency

Unbalanced

Modulation

tSYS × 5/2

1/(4 × fOUT)

sec

Polarity Detection

Enabled

tSYS × 5

1/(4 × fOUT)

sec

REFERENCE MONITORS

Table 6.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

REFERENCE MONITORS

Reference Monitor

Loss of Reference

Detection Time

4.9 + 0.13 × tPFD

µs

tPFD is the nominal phase detector period, R/fREF, where

R is the frequency division factor determined by the R

divider, and fREF is the frequency of the active reference

in MHz.

Frequency Out of

Range Limits

5 × 10−8

0.015

Δf/fREF

fREF is the reference input frequency and Δf is the

frequency deviation relative to fREF; programmable with

the lower bound subject to quality of the system clock

(or the source of system clock compensation)

Validation Timer

0.001

1048

sec

Programmable in 1 ms increments

Excess Jitter Alarm Threshold

65535

Programmable in 1 ns increments

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