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AD9545 Datasheet(PDF) 61 Page - Analog Devices |
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AD9545 Datasheet(HTML) 61 Page - Analog Devices |
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61 / 157 page ![]() Data Sheet AD9545 Rev. A | Page 61 of 157 N-Shot Pattern Generation An N-shot pattern consists of a specified clock segment and gap segment per the 6-bit unsigned N-shot bit field and 8-bit unsigned N-shot gap bit field, respectively. The N-shot bit fields reside in Register 0x10D3, Bits[5:0] and Register 0x14D3, Bits[5:0]. The N-shot gap bit fields reside in Register 0x10D2 and Register 0x14D2. The clock and gap segment are in units of the Q divider output period, as shown in Figure 50. The N-shot generator treats a value of 0 for the N-shot bit field as clock segment = 0 and a value of 0 for the N-shot gap bit field as gap segment = 1, resulting in no output. The N-shot generator is capable of burst or periodic operation. To select burst or periodic operation, use the N-shot request mode bit in Register 0x10D3, Bit 6, and Register 0x14D3, Bit 6. When N-shot request mode = 0, the N-shot generators operate in burst mode (see Figure 51). When N-shot request mode = 1, the N-shot generators operate in periodic gapped mode (see Figure 52). In burst operation, the rising edge of the trigger signal constitutes the trigger event. Prior to the burst, the generator is in its default state (Logic 0), which it holds until triggered (see the N-Shot Triggering section). When triggered, the N-shot generator produces an output sequence (see the bottom trace of Figure 50). At the end of the sequence, the N-shot generator remains in its default state (Logic 0). In burst operation, the output appears as a sequence of Q divider cycles per the N-shot bit field (where the clock segment = 6 in Figure 50). The gap period (where the gap segment = 10 in Figure 50) is effectively an extension of the default output condition, which is the low state. In periodic operation, the logic level of the trigger matters (rather than the rising edge as in burst mode). The N-shot generator, starting from its default state (Logic 0), waits for the trigger to assume a Logic 1 state. At this point, the N-shot generator begins repeatedly generating the burst pattern (clock segment pulses, then gap segment pulses) per Figure 52. The N-shot generator continues generating burst patterns until the trigger assumes a Logic 0 state. The occurrence of the Logic 0 state informs the generator to stop synchronously. That is, if the generator is not in the gap portion of the burst, it stalls at the end of the current pulse as shown in Figure 53. Furthermore, returning the trigger signal to Logic 1 causes the pattern to resume from where it previously stopped (that is, with the absent pulses shown in Figure 53). Q DIVIDER OUTPUT CLOCK OUTPUT Q DIVIDER PERIOD BASED ON ITS INPUT CLOCK AND DIVIDE RATIO CLOCK SEGMENT = 6 GAP SEGMENT = 10 TIME Figure 50. N-Shot Plus Gap Clock Signal Q DIVIDER OUTPUT CLOCK OUTPUT Q DIVIDER PERIOD (PER ITS INPUT CLOCK AND DIVIDE RATIO) CLOCK SEGMENT = 6 GAP SEGMENT = 10 TRIGGER BURST RISING EDGE OF TRIGGER INITIATES BURST BURST ENDS AFTER CLK AND GAP Q-DIVIDER CYCLES TIME Figure 51. Burst Clock Signal CLOCK OUTPUT BURST PATTERN TRIGGER FALLING EDGE TERMINATES PERIODIC BURST START PATTERN GENERATION BURST PATTERN BURST PATTERN BURST PATTERN BURST PATTERN TIME Figure 52. Periodic Gapped Clock Signal |
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