Electronic Components Datasheet Search
  English  ▼

X  

AD9545 Datasheet(PDF) 75 Page - Analog Devices

Part # AD9545
Description  Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner
PDF  157 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9545 Datasheet(HTML) 75 Page - Analog Devices

Back Button AD9545 Datasheet HTML 71Page - Analog Devices AD9545 Datasheet HTML 72Page - Analog Devices AD9545 Datasheet HTML 73Page - Analog Devices AD9545 Datasheet HTML 74Page - Analog Devices AD9545 Datasheet HTML 75Page - Analog Devices AD9545 Datasheet HTML 76Page - Analog Devices AD9545 Datasheet HTML 77Page - Analog Devices AD9545 Datasheet HTML 78Page - Analog Devices AD9545 Datasheet HTML 79Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 75 / 157 page
background image
Data Sheet
AD9545
Rev. A | Page 75 of 157
The NCO, VCO, TDCs, and the APLL PFD inputs each have
specific frequency limits. The following formulas relate fNCO,
fVCO, fTDC and fPFD to Z, fREFx, fOUTx, and divider values. Note that
each formula has two solutions: one with respect to the input
frequency (fREFx) and the other with respect to the output
frequency (fOUTx). The user must ensure that fNCO, fVCO, fTDC, and
fPFD are within their specified frequency bounds.
fTDC = fREFx/Rx
= (Z/Ry) × fOUTx
(11)
fNCO = fPFD = ((2 × Q × Ry)/(Rx × M)) × fREFx
= (2 × Q/M) × fOUTx
(12)
fVCO = ((2 × Q × Ry)/(Rx × Z)) × fREFx
= 2 × Q × fOUTx
(13)
When the reference source is auxiliary NCO 0, auxiliary NCO 1
or the feedback from the other DPLL, then in Equation 11
through Equation 13, use Rx = 1.
Although the feedback divider (N-divider) does not appear in
Figure 65, it requires special treatment for external zero delay
operation. See the DPLL Feedback Divider (N-Divider section
for details.
REFx
REFy
TDC
TDC
OUTxyN/
OUTxyP
REFx
TDC
AD9545
Rx
Ry
REFy
TDC
AUX
NCO 0/NCO 1
TDC
TDC
OTHER DPLL
FEEDBACK
TDC
TDC
DIGITAL CROSS
POINT MUX
fS
TIME STAMP PROCESSOR,
DIGITAL LOOP FILTER,
TUNING WORD PROCESSOR
AND NCO
PFD
AND
LOOP
FILTER
M-DIVIDER
Z
OUTPUT
DISTRIBUTION
DPLL
SYSTEM
CLOCK
LFx
XOA XOB
Q
APLL
VCO
÷2
Figure 65. External Zero Delay PLL Configuration



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com