AD9545 datasheet(48/157 Pages) AD

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AD9545

Data Sheet

Rev. A | Page 48 of 157

TIME

MODULATION

EVENT

BASE

EDGE

SYNC EDGE

MODULATION

EVENT

BASE

EDGE

SYNC EDGE

MODULATION PERIOD

MODULATED

CARRIER

DEMOD OUT

POLARITY OUT

SYNC EDGE = 0

DEMOD OUT

POLARITY OUT

SYNC EDGE = 1

DEMOD OUT

POLARITY OUT

SYNC EDGE = 2

DEMOD OUT

POLARITY OUT

SYNC EDGE = 3

Figure 46. Demodulation Synchronization

DEMODULATOR DELAY

The demodulated signal is a single pulse with a duration equal

to the period of the input carrier clock as shown by the demod

out traces in Figure 46. When the demodulator identifies a

modulation event within the carrier signal, it denotes the next

rising edge of the carrier as the modulation base edge. The position

of the pulse can be any one of four subsequent carrier clock

periods after the base edge. The pulse position is programmable

and allows some control over the latency through the demodula-

tor. To specify the pulse position use the 2-bit unsigned REFx

demodulator sync edge bit field (where x is A, AA, B, or BB)

in Bits[D5:D4] of Register 0x0302 to Register 0x0303 and

(default), 1, 2, or 3, corresponds to the desired sync edge in

Figure 46 (REFx demodulator sync edge = 0 is not valid).

DEMODULATOR POLARITY

Modulation events span two clock periods of the carrier signal

as detailed in the Distribution Embedded Output Clock

Modulation section. Normal polarity constitutes the first pulse

having greater than 50% duty cycle with an optional second

pulse having less than 50% duty cycle, that is (50 + x)% followed

by an optional (50 − x)%. Alternate polarity is the opposite: a

less than 50% duty cycle pulse optionally followed by a more

than 50% duty cycle pulse.

The demodulator is most sensitive when it is aware of the

modulation polarity in advance. The user can take advantage of

this sensitivity by informing the demodulator of the polarity of

the embedded modulation events via the REFx demodulator

event polarity bit (where x is A, AA, B, or BB) in Bit D2 of

modulation exhibits normal polarity, whereas Logic 1 indicates

alternate polarity.

The REFx demodulator event polarity bit is only meaningful

when automatic polarity detection is not in effect.

AUTOMATIC POLARITY DETECTION

The demodulators are capable of automatically detecting the

polarity of modulation events. To enable this feature, use the

enable REFx demodulator polarity bit (where x is A, AA, B, or

BB) in Bit D7 of Register 0x0302 to Register 0x0303 and

automatic polarity detection, whereas Logic 1 enables it.

When enable REFx demodulator polarity = 1, the demodulator

detects the polarity (normal or alternate) of each modulation

event and latches the result (normal polarity is Logic 0, alternate

polarity is Logic 1) to polarity out (see Figure 45). When enable

REFx demodulator polarity = 0, the demodulator does not

produce a polarity out signal.

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