IP175DLF datasheet(104/145 Pages) ETC

104 / 145 page

IP175DLF

Datasheet

104/145

August 22, 2014

IP175DLF-DS-R10.1

5.6

Rate Control

5.6.1

Basic Rate Setting Register

PHY

MII

ROM

R/W

Description

Default

8[7]

RESERVED

1’b0

8[6:0]

R/W BW_TI[6:0]

Rate control time interval.

Only used by egress port and output queue

unit : millisecond

7’h01

9[15:0]

R/W BW_MBS[15:0]

Rate control Maximum Burst Size

Expressed in byte.

16’h

0000

10[15:0]

R/W BW_CREDIT_SIZE[15:0]

Credit size to accumulate the bucket in per time interval.

Expressed in byte.

16’h

0000

5.6.2

Rate Setting Access Control Register

PHY

MII

ROM

R/W

Description

Default

12[2:0]

R/W BW_PORT[2:0]

Port number for setting bandwidth rate.

3’h0

12[3]

R/W BW_IOE

Bandwidth rate setting is on ingress or egress port

0: ingress port (default)

1: egress port

1’b0

12[5:4]

R/W BW_QUEUE[1:0]

Assign the egress output queue number for setting rate control

value

2’b00:egress port (default)

2’b01:queue 1

2’b10:queue 2

2’b11:queue 3

2’b00

12[8]

R/W BW_RW

Rate control data read/write signal

0: read rate control data (default)

1: write rate control data

1’b0

12[9]

R/W

(SC)

BW_RW_START

Indicates start read/write rate control data of a port, when write a

logical “1” to this register.

A self cleared register after read/write data done.

1’b0

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