TMS320F datasheet(114/389 Pages) TI

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How To Use the Instruction Descriptions

7-14

7.2.2

Operands

Operands can be constants, or assembly-time expressions referring to

memory, I/O ports, register addresses, pointers, shift counts, and a variety of

other constants. The operands category for each instruction description de-

fines the variables used for and/or within operands in the syntax expressions.

For example, for the ADD instruction, the syntax category gives these syntax

expressions:

ADD

dma [, shift ]

Direct addressing

ADD

dma, 16

Direct with left shift of 16

ADD

ind [, shift [, ARn] ]

Indirect addressing

ADD

ind, 16 [, ARn]

Indirect with left shift of 16

ADD #

Short immediate addressing

ADD #

lk [, shift ]

Long immediate addressing

The operands category defines the variables

dma, shift, ind, n, k, and lk. For

ind, an indirect addressing variable, you supply one of the following seven

symbols:

*–

*0+

*0–

*BR0+

*BR0–

These symbols are defined in subsection 6.3.2,

Indirect Addressing Options,

on page 6-9.

7.2.3

Opcode

The opcode category breaks down the various bit fields that make up each

instruction word. When one of the fields contains a constant value derived

directly from an operand, it has the same name as that operand. The contents

of fields that do not directly relate to operands have other names; the opcode

category either explains these names directly or refers you to a section of this

book that explains them in detail. For example, these opcodes are given for

the ADDC instruction:

ADDC

dma

987

6543

210

dma

ADDC

ind [, ARn]

987

6543

210

ARU

NAR

Note:

ARU, N, and NAR are defined in Section 6.3,

Indirect Addressing Mode (page 6-9).

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