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TMS320F Datasheet(PDF) 292 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 292 Page - Texas Instruments

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XOR
Exclusive OR With Accumulator
7-192
Syntax
XOR
dma
Direct addressing
XOR
ind [, ARn]
Indirect addressing
XOR #
lk [, shift ]
Long immediate addressing
XOR #
lk,16
Long immediate with left
shift of 16
Operands
dma:
7 LSBs of the data-memory address
shift:
Left shift value from 0 to 15 (defaults to 0)
n:
Value from 0 to 7 designating the next auxiliary register
lk:
16-bit long immediate value
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
XOR
dma
15
14
13
12
11
10
987
6543
210
0
1
1
0
1
1
0
0
0
dma
XOR
ind [, ARn]
15
14
13
12
11
10
987
6543
210
0
1
1
0
1
1
0
0
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
XOR #
lk [, shift]
15
14
13
12
11
10
987
6543
210
1
0
1
1
1
1
1
1
1
1
0
1
shift
lk
XOR #
lk, 16
15
14
13
12
11
10
987
6543
210
1
0
1
1
1
1
1
0
1
0
0
0
0
0
1
1
lk
Execution
Increment PC, then ...
Event(s)
Addressing mode
(ACC(15:0)) XOR (data-memory address)
→ ACC(15:0) Direct or indirect
(ACC(31:16))
→ ACC(31:16)
(ACC(31:0)) XOR lk
 2shift → ACC(31:0)
Long immediate
(ACC(31:0)) XOR lk
 216→ ACC(31:0)
Long immediate
with left shift of 16
Opcode



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