VT8235 datasheet(103/145 Pages) VIA

103 / 145 page

VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-97-

Device 17 Function 1 Enhanced IDE Controller Registers

UrpuytvrÃDp

XrÃ8rp

Offset 4B-48 - Drive Timing Control (A8A8A8A8h)......RW

The following fields define the Active Pulse Width and

Recovery Time for the IDE DIOR# and DIOW# signals when

accessing the data ports (1F0 and 170):

One Completed Cycle

?]]]]]]]]]]]]"?

DIOR# / DIOW#

KIOOOOOUKKKKKKIO

Active Time

Recovery Time

31-28 Primary Drive 0 Active Pulse Width

...... def=1010b

27-24 Primary Drive 0 Recovery Time

............. def=1000b

23-20 Primary Drive 1 Active Pulse Width

...... def=1010b

19-16 Primary Drive 1 Recovery Time

............. def=1000b

15-12 Secondary Drive 0 Active Pulse Width

.. def=1010b

11-8 Secondary Drive 0 Recovery Time

......... def=1000b

7-4

Secondary Drive 1 Active Pulse Width

.. def=1010b

3-0

Secondary Drive 1 Recovery Time

......... def=1000b

The actual value for each field is the encoded value in the field

plus one and indicates the number of PCI clocks.

For

example, if the value in the field is 1010b (10 decimal), the

active pulse width or recovery time is 11 PCI clocks.

Offset 4C - Address Setup Time (FFh) ............................RW

The following fields define the Address Setup Time.

The

Address Setup Time is measured from the point when address

signals are stable to the point when DIOR# and DIOW# are

asserted. The IDE specification requires the setup time to not

exceed 1T.

However, the VT8233 provides flexibility for

devices that may not be able to meet the 1T requirement.

7-6

Primary Drive 0 Address Setup Time

5-4

Primary Drive 1 Address Setup Time

3-2

Secondary Drive 0 Address Setup Time

1-0

Secondary Drive 1 Address Setup Time

For each field above:

00 1T

01 2T

10 3T

11 4T

....................................................default

Offset 4E – Sec Non-1F0 Port Access Timing (B6h).......RW

7-4

DIOR# / DIOW# Active Pulse Width

.......def = 0Bh

3-0

DIOR# / DIOW# Recovery Time

.............. def = 06h

Offset 4F – Pri Non-1F0 Port Access Timing (B6h) .......RW

7-4

DIOR# / DIOW# Active Pulse Width

.......def = 0Bh

3-0

DIOR# / DIOW# Recovery Time

.............. def = 06h

The above fields define the primary and secondary channel

DIOR# and DIOW# active pulse widths and recovery times

when accessing non-data ports. The times are defined in terms

of PCI clocks and the actual value is equal to the value

encoded in the field plus one.

Offset 53-50 - UltraDMA Extended Timing Control ..... RW

Pri Drive 0 UltraDMA-Mode Enable Method

Enable by using “Set Feature” command .... def

Enable by setting bit-30 of this register

Pri Drive 0 UltraDMA-Mode Enable

Disable ................................................... default

Enable UltraDMA-Mode Operation

Pri Drive 0 Transfer Mode

DMA or PIO Mode ............................... default

UltraDMA Mode

Pri Drive 0 Cable Type Reporting

40-pin cable is being used...................... default

80-pin cable is being used

27-24 Pri Drive 0 Cycle Time (T = 7.5 ns for 133 MHz)

0000

0001

0010

0011

0100

0101

0110

0111

............................. default

1000

10T

1001

11T

1010

12T

1011

13T

1100

14T

1101

15T

1110

16T

1111

17T

Pri Drive 1 UltraDMA-Mode Enable Method

Pri Drive 1 UltraDMA-Mode Enable

Pri Drive 1 Transfer Mode

Pri Drive 1 Cable Type Reporting

40-pin cable is being used...................... default

80-pin cable is being used

19-16 Pri Drive 1 Cycle Time....................default = 0111b

Sec Drive 0 UltraDMA-Mode Enable Method

Sec Drive 0 UltraDMA-Mode Enable

Sec Drive 0 Transfer Mode

Sec Drive 0 Cable Type Reporting

40-pin cable is being used...................... default

80-pin cable is being used

11-8 Sec Drive 0 Cycle Time ..................default = 0111b

Sec Drive 1 UltraDMA-Mode Enable Method

Sec Drive 1 UltraDMA-Mode Enable

Sec Drive 1 Transfer Mode

Sec Drive 1 Cable Type Reporting

40-pin cable is being used...................... default

80-pin cable is being used

3-0

Sec Drive 1 Cycle Time ..................default = 0111b

Each byte defines UltraDMA operation for the indicated drive.

The bit definitions are the same within each byte.

VT8235 Datasheet(PDF) 103 Page - VIA Technologies, Inc.

VT8235 Datasheet(HTML) 103 Page - VIA Technologies, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL