VT8235 datasheet(137/145 Pages) VIA

137 / 145 page

VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-131-

Device 18 Function 0 LAN Registers

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Offset A0 – Wake On LAN Control Set (00h)................RW

Offset A4 – Wake On LAN Control Clear (00h) ............RW

Link Off Detected

(determines whether the system

wakes up from link off detection)

Link On Detected

(determines whether the system

wakes up from link on detection)

Magic Packet Filter

(determines whether the system

wakes up when a Magic Packet is detected)

Unicast Filter

(determines whether the system wakes

up when a Unicast Packet is detected)

CRC3 Pattern Match Filtering

(determines whether

the system wakes up when packet matching CRC3

pattern is detected)

CRC2 Pattern Match Filtering

(determines whether

the system wakes up when packet matching CRC2

pattern is detected)

CRC1 Pattern Match Filtering

(determines whether

the system wakes up when packet matching CRC1

pattern is detected)

CRC0 Pattern Match Filtering

(determines whether

the system wakes up when packet matching CRC0

pattern is detected)

All bits above:

Disable .................................................. default

Enable

Offset A1 – Power Configuration Set (00h).....................RW

Offset A5 – Power Configuration Clear (00h) ................RW

7-6

Reserved

........................................ always reads 0

WOL Type

Driven by Level..................................... default

Driven By Pulse

Legacy WOL

Disable .................................................. default

Enable

3-2

Reserved

........................................ always reads 0

1-0

Reserved (Do Not Program)

.................... default = 0

Offset A3 – Wake On LAN Configuration Set (00h) ..... RW

Offset A7 – Wake On LAN Configuration Clear (00h) . RW

Force Power Management Enable over PME

Enable Bit (Legacy Use Only)

Full Duplex During Suspend

Accept Multicast During Suspend

This bit controls whether multicast packets are

accepted during suspend state. Whether a multicast

packet will actually wake up the system depends on

whether the packet is a type of packet set to wake up

the system, as determined by RxA0[5:0].

Accept Broadcast During Suspend

This bit controls whether broadcast packets are

accepted during suspend state. Whether a broadcast

packet will actually wake up the system depends on

whether the packet is a type of packet set to wake up

the system, as determined by RxA0[5:0].

MDC Acceleration

Extend Clock During Suspend

When enabled, the clock to the PHY is sent prior to

the start of data to allow more time for the PHY to

return to ready state.

1-0

Reserved

........................................always reads 0

All bits above:

Disable ................................................... default

Enable

Offset B3-B0 – Pattern CRC0.......................................... RW

127-0 CRC0 Pattern

...........................................default = 0

Offset B7-B4 – Pattern CRC1.......................................... RW

127-0 CRC1 Pattern

...........................................default = 0

Offset BB-B8 – Pattern CRC2 ......................................... RW

127-0 CRC2 Pattern

...........................................default = 0

Offset BF-BC – Pattern CRC3 ........................................ RW

127-0 CRC3 Pattern

...........................................default = 0

Offset CF-C0 – Byte Mask 0 ............................................ RW

Offset DF-D0 – Byte Mask 1 ............................................ RW

Offset EF-E0 – Byte Mask 2............................................. RW

Offset FF-F0 – Byte Mask 3 ............................................. RW

VT8235 Datasheet(PDF) 137 Page - VIA Technologies, Inc.

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