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VT8235 Datasheet(PDF) 143 Page - VIA Technologies, Inc. |
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VT8235 Datasheet(HTML) 143 Page - VIA Technologies, Inc. |
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143 / 145 page ![]() VT8235 V-Link South Bridge Revision 1.22 October 24, 2002 -137- Electrical Specifications UrpuytvrÃDp XrÃ8rp Register Bits Powered by VBAT Register Description RTC Rx0D[7] VBAT Voltage OK F0 Rx96[3:0] CPU Frequency Strapping Value PMIO Rx20[0] GPI0 Status PMIO Rx20[6] INTRUDER# Status PMIO Rx22[2] Enable SCI on KBC PME Asserted Register Bits Powered by VSUS25 Register Description F0 Rx81[2] RTC Enable Gated During Soft Off F0 Rx94[7:0] Power Well Control Register F0 Rx95[3:0] Misc Power Well Control Register PMIO Rx00[15,11,10,8] Wake, Abnormal PowerOff, RTC Alarm, and Power Button Status bits PMIO Rx02[10,8] RTC Alarm and Power Button Enables PMIO Rx04[12:10] Sleep Type PMIO Rx20[13,11,9:8,5:2] AC97 Wakeup, LID, USB Resume, Ring, PME#, EXTSMI#, LAN PME, and KBC PME Status bits PMIO Rx22[13,11,8,6:3,1:0] SCI on corresponding bits of PMIO Rx20 PMIO Rx24[13,11,8,6:3,1:0] SMI on corresponding bits of PMIO Rx20 PMIO Rx2C[7,5,2] LID polarity, Battery Low Resume Disable, Power Button triggering select PMIO Rx4C[4:0] GPO 4:0 Output Value |
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