PM7346 datasheet(241/419 Pages) PMC

241 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 220

Table 17

- RXCP-50 Cell Delination Algorithm Base

ALIGN[1:0]

Cell Delineation Algorithm base

Bit

Nibble (DS3)

Byte (E3,J2, E1, T1)

Unused

IN52:

The IN52 bit defines the number of bytes contained in incoming cells. When

IN52 is a logic '0', incoming cells are 53 bytes in length. When IN52 is a logic

'1', incoming cells are 52 bytes in length. In order for ATM cell delineation to

function properly, incoming cells must be 53 bytes in length including a valid

HCS byte. The HCS byte can be stripped off on the Utopia side using the

DS27_53 register bit. If the S/UNI QJET is operating in PPP mode, incoming

"cells" may be composed of 52 or 53 bytes without an HCS byte. In this case,

the CCDIS register bit should be set to disable cell delineation, and the

DS27_53 register bit should be set so that it is consistent with IN52.

IDLEPASS:

The IDLEPASS bit controls the function of the Idle Cell filter. When

IDLEPASS is written with a logic 0, all cells that match the Idle Cell Header

Pattern and Idle Cell Header Mask are filtered out. When IDLEPASS is a

logic 1, the Idle Cell Header Pattern and Mask registers are ignored. The

default state of this bit and the bits in the Idle Cell Header Mask and Idle Cell

Header Pattern Registers enable the dropping of idle cells.

HCSPASS:

The HCSPASS bit controls the dropping of cells based on the detection of an

uncorrectable HCS error. When HCSPASS is a logic 0, cells containing an

uncorrectable HCS error are dropped. When HCSPASS is a logic 1, cells are

passed to the receive FIFO regardless of errors detected in the HCS.

Additionally, the HCS verification finite state machine never exits the

correction mode.

Regardless of the programming of this bit, cells are always dropped while the

cell delineation state machine is in the 'HUNT' or 'PRESYNC' states unless

the CCDIS bit in this register is set to logic 1.

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