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PM7346 Datasheet(PDF) 118 Page - PMC-Sierra, Inc

Part # PM7346
Description  SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PDF  419 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7346 Datasheet(HTML) 118 Page - PMC-Sierra, Inc

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PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 97
Register 003H, 103H, 203H, 303H: S/UNI-QJET Receive Configuration
Bit
Type
Function
Default
Bit 7
R/W
RFRM[1]
0
Bit 6
R/W
RFRM[0]
0
Bit 5
R/W
LOFINT[1]
0
Bit 4
R/W
LOFINT[0]
0
Bit 3
R/W
RSCLKR
0
Bit 2
R/W
RCLKINV
0
Bit 1
R/W
RPOSINV
0
Bit 0
R/W
RNEGINV
0
RNEGINV:
The RNEGINV bit provides polarity control for input RNEG/RLCV/ROHM.
When a logic 0 is written to RNEGINV, the input RNEG/RLCV/ROHM is not
inverted. When a logic 1 is written to RNEGINV, the input
RNEG/RLCV/ROHM is inverted. The RNEGINV bit setting does not affect the
loopback data in diagnostic loopback.
RPOSINV:
The RPOSINV bit provides polarity control for input RPOS/RDATI. When a
logic 0 is written to RPOSINV , the input RPOS/RDATI is not inverted. When
a logic 1 is written to RPOSINV , the input RPOS/RDATI is inverted. The
RPOSINV bit setting does not affect the loopback data in diagnostic
loopback.
RCLKINV:
The RCLKINV bit provides polarity control for input RCLK. When a logic 0 is
written to RCLKINV, RCLK is not inverted and inputs RPOS/RDATI and
RNEG/RLCV/ROHM are sampled on the rising edge of RCLK. When a logic
1 is written to RCLKINV, RCLK is inverted and inputs RPOS/RDATI and
RNEG/RLCV/ROHM are sampled on the falling edge of RCLK.
RSCLKR:
The RSCLKR bit has effect only when the FRMRONLY bit in the S/UNI-QJET
Configuration 1 register is set to logic 1. When RSCLKR is a logic 1, the
RDATO, RFPO/RMFPO, and ROVRHD outputs are updated on the rising



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