CP2201 datasheet(67/108 Pages) SILABS

67 / 108 page

CP2200/1

Rev. 1.0

The Receive FIFO Full interrupt will be generated once all free space in the buffer is used or all TLB slots are filled.

The host processor should read the RXFIFOSTA register to determine the cause of the interrupt. To receive

additional packets after the buffer is filled, packets must be removed from the buffer by reading them out or

discarding them. Packets can be discarded one at a time or all at once by writing ‘1’ to RXCLEAR (RXCN.0).

12.7. Receive Buffer Advanced Status and Control Registers

The receive buffer is controlled and managed through the registers in Table 17. These registers are not commonly

accessed by the host processor except for debug purposes.

Table 17. Receive Status and Control Register Summary

Long Name

Address

Description

CPTLB

Current Packet TLB Number

0x1A

Specifies the TLB number (0–7) associated with

the current packet.

TLBVALID

TLB Valid Indicator

0x1C

Indicates which TLBs currently have valid pack-

ets.

TLBnINFOH

TLBnINFOL

TLBn Packet Information

multiple Specifies information about the packet associ-

ated with TLBn (n = 0–7).

TLBLENH

TLBLENL

TLBn Packet Length

multiple Specifies the length of the packet associated

with TLBn (n = 0–7).

TLBnADDRH

TLBnADDRL

TLBn Packet Address

multiple Specifies the starting address of the packet

associated with TLBn (n = 0–7).

RXFIFOTAILH

RXFIFOTAILL

Receive FIFO Buffer Tail Pointer

0x15

0x16

Points to the byte following the last valid byte.

This is where new packets are added.

RXFIFOHEADH

RXFIFOHEADL

Receive FIFO Buffer Head

Pointer

0x17

0x18

Points to the beginning of the current packet

and is incremented with each Auto Read.

RXFIFOSTA

Receive FIFO Buffer Status

0x5B

Indicates the cause of the Receive FIFO Buffer

Full interrupt.

Bits 7–3: UNUSED. Read = 00000b; Write = don’t care.

Bits 2–0: CPTLB[2:0]: Current Packet TLB Number

The TLB Number (0–7) of the TLB slot associated with the current packet.

R/W

Reset Value

—

CPTLB

00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Address:

0x1A

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