CP2201 datasheet(32/108 Pages) SILABS

32 / 108 page

CP2200/1

Rev. 1.0

Note: Reading this register will not clear INT0 interrupt flags.

Bit 7:

EOPINTR: End of Packet Read-Only Interrupt Flag

0: The last byte of a packet has not been read since the last time EOPIF was cleared.

1: The last byte of a packet has been read.

Bit 6:

RXEINTR: Receive FIFO Empty Read-Only Interrupt Flag

0: The receive FIFO has not been empty since the last time RXFIFOE was cleared.

1: The receive FIFO is empty.

Bit 5:

SELFINTR: Self Initialization Complete Read-Only Interrupt Flag

0: Self Initialization has not completed since the last time SELFINT was cleared.

1: Self Initialization has completed.

Bit 4:

OSCINTR: Oscillator Initialization Complete Read-Only Interrupt Flag

0: Oscillator Initialization has not completed since the last time OSCINT was cleared.

1: Oscillator Initialization has completed.

Bit 3:

FLWEINTR: Flash Write/Erase Operation Complete Read-Only Interrupt Flag

0: A Flash write or erase operation has not completed since the last time FLWEINT was cleared.

1: A Flash write or erase operation has completed.

Bit 2:

TXINTR: Packet Transmitted Read-Only Interrupt Flag

0: A packet transmission has not completed since the last time TXINT was cleared.

1: A packet has been transmitted.

Bit 1:

RXFINTR: Receive FIFO Full Read-Only Interrupt Flag

0: The receive FIFO has not been full since the last time RXFINT was cleared.

1: The receive FIFO is full.

Bit 0:

RXINTR: Packet Received Read-Only Interrupt Flag

0: A packet has not been added to the receive buffer since the last time RXINT was cleared.

1: A packet has been added to the receive buffer.

RRR

Reset Value

EOPINTR RXEINTR SELFINTR OSCINTR FLWEINTR TXINTR RXFINTR RXINTR 00000000

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Address:

0x76

CP2201 Datasheet(PDF) 32 Page - Silicon Laboratories

CP2201 Datasheet(HTML) 32 Page - Silicon Laboratories

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