TMPR3916 datasheet(186/225 Pages) TOSHIBA

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Chapter 10 Asynchronous Serial Interface (UART)

Preliminary

10-11

10.2.2

Line Control Register (SILCR)

Bit

Name



Bit

1514

131211

Name

RWUB

TWUB



OUTSEL

IRDA

LSBF

Bit

543

210

Name



SCS

UEPS

UPEN

USBL

UMODE

Bit

Name

Function

Reset

Value

R/W

31:16



Wired to zero

RWUB

Wake Up Bit for Receive

0 = The UART does not wait for a wake-up-bit

1 = The UART is looking for a wake-up-bit

Used only in multi controller mode.

R/W

TWUB

Wake Up Bit for Transmit

0 = Next frame contains data (wake-up-bit = 0)

1 = Next frame contains address (wake-up-bit = 1)

The contents of this bit make only sense in multi controller mode.

R/W



Not used / Always write to “0”

0R/W

12:11



Wired to zero

OUTSEL

Clock Output Select

0 = Clock frequency is the same as in Baud Rate Register (SIBGR)

specified

1 = Clock frequency is 16 times the value specified in Baud Rate

R/W

IRDA

IrDA Clock

0 = No output of IrDA clock

1 = Output of IrDA clock

It has no meaning when OUTSEL = 1.

R/W

LSBF

LSB First

0 = Reads or sends the MSB first

1 = Reads or sends the LSB first

R/W



Wired to zero

6:5

SCS

SIO Clock Select

00 = Internal system clock

01 = Baud rate generator provided with internal clock

10 = External clock

11 = Baud rate generator provided with external clock

R/W

UEPS

UART Parity Select

0 = Odd Parity

1 = Even Parity

R/W

UPEN

UART Parity Enable

0 = Disable Parity Check

1 = Enable Parity Check

The bit should be 0 in the multi controller system mode (UMODE =

10, 11).

R/W

USBL

UART Stop Bit Length

0 = 1 bit

1 = 2 bit

R/W

TMPR3916 Datasheet(PDF) 186 Page - Toshiba Semiconductor

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