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XC2000 Datasheet(PDF) 103 Page - Infineon Technologies AG

Part # XC2000
Description  16/32-Bit Single-Chip Microcontroller with 32-Bit Performance Volume 1 (of 2): Peripheral Units
PDF  647 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

XC2000 Datasheet(HTML) 103 Page - Infineon Technologies AG

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XC2000 Derivatives
System Units (Vol. 1 of 2)
Memory Organization
Preliminary
User’s Manual
3-41
V1.0, 2007-06
MemoryX2K, V1.1
3.9.6.3
The Upper Layer “Protection State”
This layer consists mainly of the 4 fields DCF, DDF, WPA and RPA of the IMB_IMBCTR
register. These determine the effective protection state together with registers of the
lower layers. Some of the above mentioned command sequences directly influence
these fields as well. In order to increase the resistance against beaming or power supply
manipulation all 4 fields are coded with 2 bits. Generally “01” means active, “10” inactive
and the two other states “00” and “11” are invalid and are recognized as “attacked” state.
Effective Security Level
The effective security level based on these 4 double-bits is summarized in Table 3-5 and
Table 3-6. For the double bits the same short notation is used as before: 1 means active,
0 means inactive, ‘#’ means invalid and ‘–’ means do not care including invalid states.
0
1
Errored protection state (see below):
–
0
0
RPA = 1, WPA = 1.
–
0
1
RPA = 1, WPA = 0.
–
1
0
RPA = 0, WPA = 1.
–
1
1
RPA = 0, WPA = 0.
Table 3-5
Effective Read Security
RPA
DCF
DDF
Security Level
0
–
–
No read protection.
1 | #
0
0
No read protection.
–
1 | #
Data reads prohibited.
1 | #
–
Code fetches prohibited.
Table 3-6
Effective Write Security
WPA
RPA
Security Level
0
–
No write protection
Table 3-4
“Flash State” Determining RPA and WPA (cont’d)
IMB_
FSR.
PROI
N
IMB_
FSR.
PROI
NER
IMB_
FSR.
RPR
O
IMB_
FSR.
RPR
ODIS
IMB_
FSR.
WPR
ODIS
Resulting Security Level in RPA and WPA



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