HD6433713 datasheet(6/324 Pages) RENESAS

6 / 324 page

2.8

Application Notes ........................................................................................................... 49

2.8.1

Notes on Data Access ......................................................................................... 49

2.8.2

Notes on Bit Manipulation.................................................................................. 51

Section 3

System Control .............................................................................................. 55

3.1

Overview......................................................................................................................... 55

3.2

Exception Handling ........................................................................................................ 55

3.2.1

Reset ................................................................................................................... 55

3.2.2

Interrupts............................................................................................................. 56

3.2.3

Interrupt Control Registers ................................................................................. 58

3.2.4

External Interrupts .............................................................................................. 66

3.2.5

Internal Interrupts ............................................................................................... 67

3.2.6

Interrupt Operations............................................................................................ 67

3.2.7

Return from an Interrupt ..................................................................................... 72

3.2.8

Interrupt Response Time..................................................................................... 72

3.2.9

Valid Interrupts in Each Mode ............................................................................ 73

3.2.10 Notes on Stack Area Use .................................................................................... 74

3.3

System Modes.................................................................................................................75

3.3.1

Active Mode ....................................................................................................... 76

3.3.2

Low-Power Operation Mode .............................................................................. 76

3.3.3

Application Notes ............................................................................................... 82

3.4

System Control Registers ............................................................................................... 83

3.4.1

System Control Register 1 (SYSCR1)................................................................ 83

3.4.2

System Control Register 2 (SYSCR2)................................................................ 85

Section 4

ROM.................................................................................................................. 87

4.1

Overview......................................................................................................................... 87

4.1.1

Block Diagram.................................................................................................... 87

4.2

PROM Mode................................................................................................................... 88

4.2.1

Selection to PROM Mode................................................................................... 88

4.2.2

Socket Adapter Pin Arrangement and Memory Map ......................................... 88

4.3

Programming ..................................................................................................................91

4.3.1

Writing and Verifying ......................................................................................... 91

4.3.2

Programming Precautions................................................................................... 94

4.3.3

Reliability of Written Data ................................................................................. 96

Section 5

RAM ................................................................................................................. 97

5.1

Overview......................................................................................................................... 97

5.1.1

Block Diagram.................................................................................................... 97

5.1.2

Display RAM Area ............................................................................................. 97

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