HD6433713 datasheet(33/324 Pages) RENESAS

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2.3.2 Memory Data Formats

Figure 2-5 indicates the data formats in memory. For access by the H8/300L CPU, word data

stored in memory must always begin at an even address. In word access the least significant bit of

the address is regarded as 0. If an odd address is specified, the access is performed at the

preceding even address. This rule affects the MOV.W instruction, and also applies to instruction

fetching.

Word access is possible to the ROM and RAM areas. For details, see 2.8.1, Notes on Data Access.

Figure 2-5 Memory Data Formats

When the stack is accessed using R7 as an address register, word access should always be

performed. For further details, see 3.2.10, Notes on Stack Area Use. When the CCR is pushed on

the stack, two identical copies of the CCR are pushed to make a complete word. When they are

restored, the lower byte is ignored.

Data Format

76543210

Address

Data Type

Address n

MSB

LSB

MSB

LSB

Upper 8 bits

Lower 8 bits

MSB

LSB

CCR

CCR*

MSB

LSB

MSB

LSB

Address n

Even address

Odd address

Even address

Odd address

Even address

Odd address

1-bit data

Byte data

Word data

Byte data (CCR) on stack

Word data on stack

Note: * Ignored on return

Notation:

CCR: Condition code register

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