HD6433713 datasheet(10/324 Pages) RENESAS

10 / 324 page

11.3.2 Clock................................................................................................................... 198

11.3.3 Data Transfer Format.......................................................................................... 198

11.3.4 Data Transmit/Receive........................................................................................ 200

11.4

Interrupts......................................................................................................................... 202

11.5

Application Notes ........................................................................................................... 202

Section 12 VFD Controller/Driver ................................................................................ 203

12.1

Overview......................................................................................................................... 203

12.1.1 Features............................................................................................................... 203

12.1.2 Block Diagram.................................................................................................... 203

12.1.3 Pin Configuration................................................................................................ 204

12.1.4 Register Configuration........................................................................................ 204

12.2

Register Descriptions...................................................................................................... 205

12.2.1 VFD Digit Control Register (VFDR) ................................................................. 205

12.2.2 VFD Segment Control Register (VFSR) ............................................................ 208

12.2.3 Digit Beginning Register (DBR) ........................................................................ 210

12.3

Operation ........................................................................................................................ 212

12.3.1 Overview............................................................................................................. 212

12.3.2 Control Section ................................................................................................... 212

12.3.3 RAM Bit Correspondence to Digits/Segments................................................... 212

12.3.4 Procedure for Starting Operation........................................................................ 214

12.4

Interrupts......................................................................................................................... 214

12.5

Occurrence of Flicker when VFD Registers are Rewritten ............................................ 214

Section 13 A/D Converter................................................................................................ 215

13.1

Overview......................................................................................................................... 215

13.1.1 Features............................................................................................................... 215

13.1.2 Block Diagram.................................................................................................... 216

13.1.3 Pin Configuration................................................................................................ 217

13.1.4 Register Configuration........................................................................................ 217

13.2

Register Descriptions...................................................................................................... 218

13.2.1 A/D Result Register (ADRR) ............................................................................. 218

13.2.2 A/D Mode Register (AMR) ................................................................................ 218

13.2.3 A/D Start Register (ADSR) ................................................................................ 221

13.2.4 Port Mode Register 0 (PMR0) ............................................................................ 222

13.3

Operation ........................................................................................................................ 222

13.4

Interrupts......................................................................................................................... 222

13.5

Typical Use ..................................................................................................................... 223

13.6

Application Notes ........................................................................................................... 227

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