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HD6433713 Datasheet(PDF) 67 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 67 Page - Renesas Technology Corp |
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67 / 324 page ![]() Figure 3-1 Reset Sequence 3.2.2 Interrupts The interrupt sources include external interrupts (IRQ5, IRQ4, IRQ1, IRQ0), and internal interrupts requested from on-chip peripheral modules. Table 3-2 shows the interrupt sources, their priorities, and their vector addresses. When more than one interrupt is requested, the interrupt with the highest priority is processed. The interrupts have the following features. • Both internal interrupts and external interrupts (IRQ5, IRQ4, IRQ1, IRQ0), can be masked by the I bit of CCR. When this bit is set to 1, interrupt request flags are set but interrupts are not accepted. • External interrupt pins IRQ4, IRQ1, and IRQ0 can be set independently for rising-edge or falling-edge sensing. For external interrupt pin IRQ5, the falling edge is sensed. Vector fetch φ Internal address bus Internal read signal Internal write signal Internal data bus (16 bits) RES Internal processing Prefetch of first instruction of program (1) Reset exception handling vector address (H'0000) (2) Program starting address (3) First instruction of program (2) (1) (3) (2) Reset state Reset exception handling and program execution 56 |
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