HD6433713 datasheet(26/324 Pages) RENESAS

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Section 2 CPU

2.1 Overview

The H8/300L CPU has sixteen 8-bit general registers, which can also be paired as eight 16-bit

registers. Its concise, optimized instruction set is designed for high-speed operation.

2.1.1 Features

The main features of the H8/300L CPU are listed below.

•

General-register architecture

— Sixteen 8-bit general registers, also usable as eight 16-bit general registers

•

Instruction set with 55 basic instructions, including:

— Multiply and divide instructions

— Powerful bit-manipulation instructions

•

Eight addressing modes

— Register direct

— Register indirect

@Rn

— Register indirect with displacement

@(d:16, Rn)

— Register indirect with post-increment or pre-decrement

@Rn+ or @–Rn

— Absolute address

@aa:8 or @aa:16

— Immediate

#xx:8 or #xx:16

— Program-counter relative

@(d:8, PC)

— Memory indirect

@@aa:8

•

64-kbyte address space

•

High-speed operation

— All frequently used instructions are executed in two to four states

— High-speed arithmetic and logic operations

— 8- or 16-bit register-register add or subtract: 0.5 µs*

—8

× 8-bit multiply:

3.5 µs*

— 16 ÷ 8-bit divide:

3.5 µs*

•

Low-power operation modes

— SLEEP instruction for transfer to low-power operation

Note: * These values are at

φ = 4 MHz.

HD6433713 Datasheet(PDF) 26 Page - Renesas Technology Corp

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