HD6433713 datasheet(275/324 Pages) RENESAS

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Table A-2 Instruction Set (cont)

Mnemonic

Operation

H N Z V C

JSR @Rn

— SP–2

→ SP

—————— 6

→ @SP

← Rn16

JSR @aa:16

— SP–2

→ SP

—————— 8

→ @SP

← aa:16

JSR @@aa:8

SP–2

→ SP

—————— 8

→ @SP

← @aa:8

RTS

— PC

← @SP

2 —————— 8

SP+2

→ SP

RTE

— CCR

← @SP

¤¤¤¤¤¤ 10

SP+2

→ SP

← @SP

SP+2

→ SP

SLEEP

— Transit to sleep mode.

2 —————— 2

LDC #xx:8, CCR

B #xx:8

→ CCR

¤¤¤¤¤¤

LDC Rs, CCR

B Rs8

→ CCR

¤¤¤¤¤¤

STC CCR, Rd

B CCR

→ Rd8

—————— 2

ANDC #xx:8, CCR

B CCR

∧#xx:8 → CCR

¤¤¤¤¤¤

ORC #xx:8, CCR

B CCR

∨#xx:8 → CCR

¤¤¤¤¤¤

XORC #xx:8, CCR

B CCR

⊕#xx:8 → CCR

¤¤¤¤¤¤

NOP

— PC

← PC+2

2 —————— 2

Notes: Set to 1 when there is a carry or borrow from bit 11; otherwise cleared to 0.

If the result is zero, the previous value of the flag is retained; otherwise the flag is cleared to 0.

Set to 1 if decimal adjustment produces a carry; otherwise cleared to 0.

The number of states required for execution is 4n+9 (n = value of R4L).

Set to 1 if the divisor is negative; otherwise cleared to 0.

Set to 1 if the divisor is zero; otherwise cleared to 0.

Addressing Mode/

Instruction Length (bytes)

Condition Code

264

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