7630 datasheet(135/238 Pages) RENESAS

135 / 238 page

2-69

7630 Group User’s Manual

APPLICATION

2.5 Serial I/O

Fig. 2.5.4 Structure of UART mode register

Fig. 2.5.5 Structure of UART baud rate generator

UART mode register

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

Name

UART mode register (UMOD) [Address : 002016]

Stop bits selection bit

0 : One stop bit

1 : Two stop bits

Clock divider selection bits

b2 b1

0 0 :

φ divided by 1

0 1 :

φ divided by 8

1 0 :

φ divided by 32

1 1 :

φ divided by 256

Parity selection bit

0 : Even parity

1 : Odd parity

Parity enable bit

0 : Parity checking disabled

1 : Parity checking enabled

UART word length selection bits

Not used (“0” when read, don't write “1”.)

b7 b6

0 0 : 7 bits

0 1 : 8 bits

1 0 : 9 bits

1 1 : Not used

UART baud rate generator

b7 b6 b5 b4 b3 b2 b1 b0

Function

At reset

UART baud rate generator (UBRG) [Address : 002116]

A count value of baud rate generator is set.

7630 Datasheet(PDF) 135 Page - Renesas Technology Corp

7630 Datasheet(HTML) 135 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL