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HC210 Datasheet(PDF) 66 Page - Altera Corporation |
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HC210 Datasheet(HTML) 66 Page - Altera Corporation |
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66 / 228 page  4–24 Altera Corporation September 2008 HardCopy Series Handbook, Volume 1 Table 4–34. HardCopy II Maximum Input Clock Rates of HC210W Devices Note (3) (Part 1 of 2) I/O Standard Memory Interface IOEs High Speed IOEs General Purpose IOEs CLK [0..3, 8..11] CLK [4..7, 12..15] FPLL_C LK PLL_FB Unit LVTTL 350 350 350 350 350 350 350 MHz 2.5-V LVTTL/LVCMOS 350 350 350 350 350 350 350 MHz 1.8-V LVTTL/LVCMOS 350 350 350 350 350 350 350 MHz 1.5-V LVTTL/LVCMOS 270 270 270 270 270 270 270 MHz LVCMOS 350 350 350 350 350 350 350 MHz SSTL2 class I 350 — — — 350 — 350 MHz SSTL2 class II 350 — — — 350 — 350 MHz SSTL18 class I 350 — — — 350 — 350 MHz SSTL18 class II 350 — — — 350 — 350 MHz 1.5-V HSTL class I 350 — — — 350 — 350 MHz 1.5-V HSTL class II 350 — — — 350 — 350 MHz 1.8-V HSTL class I 350 — — — 350 — 350 MHz 1.8-V HSTL class II 350 — — — 350 — 350 MHz PCI (1) 315 — 315 — 315 — 315 MHz PCI-X (1) 315 — 315 — 315 — 315 MHz Differential SSTL2 class I (2) — — — — 350 — 350 MHz Differential SSTL2 class II (2) — — — — 350 — 350 MHz Differential SSTL18 class I (2) — — — — 350 — 350 MHz Differential SSTL18 class II (2) — — — — 350 — 350 MHz 1.8-V differential HSTL class I (2) — — — — 350 — 350 MHz 1.8-V differential HSTL class II (2) — — — — 350 — 350 MHz 1.5-V differential HSTL class I (2) — — — — 350 — 350 MHz 1.5-V differential HSTL class II (2) — — — — 350 — 350 MHz LVDS — 320 — 320 320 320 320 MHz LVPECL — — — — 320 — 320 MHz |
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