HC210 datasheet(26/228 Pages) ALTERA

26 / 228 page

2–18

Altera Corporation

Preliminary

September 2008

HardCopy Series Handbook, Volume 1

Figure 2–4. I/O Type Support in HC210 and HC220 Devices

Notes (1), (2)

Bank 4

Memory Interface IOEs

PLL 5

Bank 9

Bank 7

General Purpose IOEs

Bank 8

General Purpose IOEs

PLL 6

Bank 10

I/O banks 3 & 4 support 3.3-V, 2.5-V, 1.8-V LVTTL/

LVCMOS, 1.5-V LVCMOS, SSTL-2, SSTL-18, 1.8-V

HSTL, 1.5-V HSTL & PCI/PCI-X I/O standards.

I/O banks 7 & 8 support 3.3-V, 2.5-V, 1.8-V LVTTL/

LVCMOS, 1.5-V LVCMOS & PCI/PCI-X I/O standards.

Bank 3

Memory Interface IOEs

Bank 2

High-Speed IOEs

Bank 1

High-Speed IOEs

Bank 5

General-Purpose IOEs

Bank 6

General-Purpose IOEs

PLL 1

PLL 2

I/O Banks 1 & 2 Support 3.3-,

2.5- & 1.8-V LVTTL/LVCMOS, 1.5-V

LVCMOS, LVDS & HyperTransport Technology

CLK, PLL_FB input pins & PLL_OUT output

pins support differential SSTL, differential HSTL,

LVDS & HyperTransport technology. CLK & PLL_FB

pins support LVPECL. DQS input pins support

differential SSTL and differential HSTL I/O standards.

CLK, PLL_FB input pins & PLL_OUT output

pins support differential SSTL, differential HSTL,

LVDS & HyperTransport technology. CLK &

PLL_FB pins support LVPECL.

I/O Banks 5 & 6 Support 3.3-,

2.5- & 1.8-V LVTTL/LVCMOS

&1.5-V LVCMOS

HC210 Datasheet(PDF) 26 Page - Altera Corporation

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