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HC210 Datasheet(PDF) 73 Page - Altera Corporation |
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HC210 Datasheet(HTML) 73 Page - Altera Corporation |
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73 / 228 page  Altera Corporation 4–31 September 2008 Maximum Output Clock Rates 1.8-V HSTL class I 4 mA 210 — — — — 210 210 MHz 6 mA 210 — — — — 210 210 MHz 8 mA 220 — — — — 220 220 MHz 10 mA 250 — — — — 250 250 MHz 12 mA (3) 270 — — — — 270 270 MHz 1.8-V HSTL class II 16 mA 190 — — — — 190 190 MHz 18 mA 200 — — — — 200 200 MHz 20 mA (3) 210 — — — — 210 210 MHz 1.5-V HSTL class I 4 mA 150 — — — — 150 150 MHz 6 mA 160 — — — — 160 160 MHz 8 mA 170 — — — — 170 170 MHz 10 mA 180 — — — — 180 180 MHz 12 mA (3) 190 — — — — 190 190 MHz 1.5-V HSTL class II 16 mA 170 — — — — 170 170 MHz 18 mA 170 — — — — 170 170 MHz 20 mA (3) 170 — — — — 170 170 MHz PCI (4) — 315 — 315 — — 315 315 MHz PCI-X (4) — 315 — 315 — — 315 315 MHz LVDS — — 320 — — — — 280 MHz HyperTransport — — 320 — — — — — MHz LVPECL — — — — — — — 280 MHz Differential SSTL2 class I (5) 8 mA 210 — — — — 210 210 MHz 12 mA (3) 280 — — — — 280 280 MHz Differential SSTL2 class II (5) 16 mA 245 — — — — 245 245 MHz 20 mA 245 — — — — 245 245 MHz 24 mA (3) 280 — — — — 280 280 MHz Differential SSTL18 class I (5) 4 mA 105 — — — — 105 105 MHz 6 mA 175 — — — — 175 175 MHz 8 mA 210 — — — — 210 210 MHz 10 mA 220 — — — — 220 220 MHz 12 mA (3) 230 — — — — 230 230 MHz Table 4–36. HardCopy II Maximum Output Clock Rate for HC210W Devices Notes (1), (6) (Part 3 of 4) I/O Standard Drive Strength Memory Interface IOEs High Speed IOEs General Purpose IOEs CLK [0, 2, 8, 10] (2) CLK [4..7, 12..15] PLL_OUT Unit Bottom Column Right Row |
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