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AS3524 Datasheet(PDF) 110 Page - ams AG |
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AS3524 Datasheet(HTML) 110 Page - ams AG |
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110 / 124 page  AS3524 C21 / C22 austriamicrosystems Data Sheet, Confidential © 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.11 110 - 124 6.2.2 CTBGA180 Package Ball-out Figure 44 CTBGA180 Package Ball--out 123456 789 10 11 12 13 14 15 16 17 18 A mpmc_ addr_0 mpmc_ addr_2 mpmc_ addr_4 mpmc_ addr_6 mpmc_ addr_10 mpmc_ addr_14 mpmc_ addr_18 vdd_me m mpmc_ clk_0 mpmc_ clk_1 vdd_me m mpmc_ data_2 mpmc_ data_4 mpmc_ data_6 mpmc_ data_8 mpmc_ data_10 mpmc_ data_12 mpmc_ data_14 B dbop_ d13 dbop_ d14 C dbop_ d12 mpmc_ addr_1 mpmc_ addr_8 mpmc_ addr_12 mpmc_ addr_16 mpmc_ addr_20 vss_mem mpmc_ fbclkin0 mpmc_ cas_n vss_mem mpmc_ data_0 mpmc_ data_9 mpmc_ data_11 mpmc_ data_13 mpmc_ data_15 dbop_ d15 D vdd_peri _L vss_peri _L vss_peri _R vdd_peri _R E xpc_7 xpc_4 mpmc_ addr_3 mpmc_ addr_5 mpmc_ addr_13 mpmc_ addr_17 mpmc_ dqm_0 mpmc_ dqm_1 mpmc_ bls_n_0 mpmc_ data_1 mpmc_ data_7 ssp_ fssout ssp_rxd ide_ ha_0 F xpc_6 xpc_3 xpc_1 ssp_ clkout ssp_txd ide_ ha_1 G xpc_5 xpc_2 xpc_0 mpmc_ addr_11 mpmc_ addr_15 mpmc_ addr_19 mpmc_ ras_n mpmc_ bls_n_1 mpmc_ data_3 naf_d_7 ide_ reset_n ide_ ha_2 H vdd_ core vss_ core xpa_0 mpmc_ addr_9 mpmc_ data_5 naf_d_6 vss_ core vdd_ core J clk_ext i2si_sdat a_in xpa_1 mpmc_ addr_7 mpmc_ dycs_n_0 mpmc_ dycs_n_1 naf_d_3 naf_d_2 naf_d_5 naf_d_4 Kclk_int i2si_sclk _out xpa_2 xpa_3 mpmc_ stcs_n_0 mpmc_ stcs_n_1 naf_d_8 naf_d_9 naf_d_1 naf_d_0 L usb_vdd a33t i2so_sclk i2si_mclk xpa_4 naf_d_12 naf_d_13 naf_d_10 naf_d_11 M usb_vssa 33t i2so_mcl k i2si_sdat a xpa_5 xpa_6 mpmc_ cke_0 mpmc_ cke_1 naf_ce0_ n naf_wp_ n naf_cle naf_d_14 naf_d_15 Nusb_dp resetext_ n i2so_sda ta naf_ale vss_peri _R vdd_peri _R P usb_dm id_dig i2c_audi o_sda i2c_audi o_sck i2si_lrck_ out xpa_7 mpmc_w e_n mpmc_o e_n naf_ce1_ n naf_we_n xpd_0 xpd_1 xpd_2 xpd_3 R usb_vssa 33t usb_rext xpd_4 xpd_5 T usb_vdd a33t vssapll vss_core _ana usb_xo intrq i2so_lrck jtag_trst_ n jtag_tms jtag_tdo naf_ce2_ n naf_re_n xpb_0 xpb_1 xpb_2 vss_core _ana xpd_6 U usb_vdd a33c xpd_7 V VBUS usb_vssa 33c vddapll vdd_core _ana usb_xi analog_t est tmsel clk_sel jtag_tck jtag_tdi naf_ce3_ n naf_bsy_ n xpb_3 xpb_4 xpb_5 vdd_core _ana xpb_6 xpb_7 6.2.3 CTBGA180 Ball List Table 83 CTBGA180 Ball List Ball Nr. BGA180 Ball Name PAD Type I/O Ball Description N3 resetext_n D IN ST I reset input (active low) K1 clk_int D IN ST I clock input (10-26MHz) J1 clk_ext D IN ST PD I clock input (10-26MHz) V8 clk_sel D IN ST PD I clock select 0 (low): clock from clk_int is used for internal clk_main 1 (high): clock from pad clk_ext is used for internal clk_main V7 tmsel D IN ST PD I test mode select |
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