82G33 datasheet(299/437 Pages) INTEL

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Intel® Management Engine (ME) Subsystem Registers (D3:F0,F1,F2,F3)

Datasheet

299

9.1.19

MID— Message Signaled Interrupt Identifiers

B/D/F/Type:

0/3/0/PCI

Address Offset:

8C–8Dh

Default Value:

0005h

Access:

Size:

16 bits

Bit

Access &

Default

Description

15:8

00h

Next Pointer (NEXT): Indicates the next item in the list. This can be

other capability pointers (such as PCI-X or PCI-Express) or it can be the

last item in the list.

7:0

05h

Capability ID (CID): Capabilities ID indicates MSI.

9.1.20

MC— Message Signaled Interrupt Message Control

B/D/F/Type:

0/3/0/PCI

Address Offset:

8E–8Fh

Default Value:

0080h

Access:

RO, RW

Size:

16 bits

Bit

Access &

Default

Description

15:8

00h

Reserved

64 Bit Address Capable (C64): Specifies whether capable of

generating 64-bit messages.

0 = Not capable

1 = Capable

6:4

000b

Multiple Message Enable (MME): Not implemented, hardwired to 0.

3:1

000b

Multiple Message Capable (MMC): Not implemented, hardwired to

MSI Enable (MSIE):

0 = Disable

1 = MSI is enabled and traditional interrupt pins are not used to

generate interrupts.

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