82G33 datasheet(378/437 Pages) INTEL

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Electrical Characteristics

378

Datasheet

11.3

Signal Groups

The signal description includes the type of buffer used for the particular signal.

PCI Express* /

Intel® sDVO

PCI Express interface signals. These signals are compatible with PCI

Express 1.1 Signaling Environment AC Specifications and are AC coupled.

The buffers are not 3.3 V tolerant. Differential voltage spec =

(|D+ – D-|) * 2 = 1.2 Vmax. Single-ended maximum = 1.25 V. Single-

ended minimum = 0 V.

DMI

Direct Media Interface signals. These signals are compatible with PCI

Express 1.0 Signaling Environment AC Specifications, but are DC coupled.

The buffers are not 3.3 V tolerant. Differential voltage spec = (|D+ - D-|)

* 2 = 1.2Vmax. Single-ended maximum = 1.25 V. Single-ended minimum

= 0 V.

GTL+

Open Drain GTL+ interface signal. Refer to the GTL+ I/O Specification for

complete details.

HCSL

Host Clock Signal Level buffers. Current mode differential pair. Differential

typical swing = (|D+ – D-|) * 2 = 1.4 V. Single ended input tolerant from

-0.35 V to 1.2 V. Typical crossing voltage 0.35 V.

SSTL-1.8

Stub Series Termination Logic. These are 1.8 V output capable buffers.

1.8 V tolerant.

SSTL-1.5

Stub Series Termination Logic. These are 1.5 V output capable buffers.

1.5 V tolerant.

CMOS

CMOS buffers

Analog

Analog reference or output. May be used as a threshold voltage or for

buffer compensation.

Table 11-4. Signal Groups

Signal Type

Signals

Notes

Host Interface Signal Groups

GTL+ Input/Outputs

FSB_ADSB, FSB_BNRB, FSB_DBSYB, FSB_DINVB_3:0,

FSB_DRDYB, FSB_AB_35:3, FSB_ADSTBB_1:0,

FSB_DB_63:0, FSB_DSTBPB_3:0, FSB_DSTBNB_3:0,

FSB_HITB, FSB_HITMB, FSB_REQB_4:0

GTL+ Common Clock

Outputs

FSB_BPRIB, FSB_BREQ0B, FSB_CPURSTB,

FSB_DEFERB, FSB_TRDYB, FSB_RSB_2:0

Analog Host I/F Ref &

Comp. Signals

FSB_RCOMP, FSB_SCOMP, FSB_SCOMPB,

FSB_SWING, FSB_DVREF, FSB_ACCVREF

GTL+ Input

FSB_LOCKB, BSEL2:0

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