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W97AH6KB Datasheet(PDF) 60 Page - Winbond |
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W97AH6KB Datasheet(HTML) 60 Page - Winbond |
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60 / 127 page ![]() W97AH6KB / W97AH2KB Publication Release Date: May 15, 2014 Revision: A01-001 - 60 - 7.4.21.3 MR32 and MR40 DQ Calibration Timing Example: RL = 3, tMRR = 2 CK_t / CK_c CA0-9 [Cmd] DQS_t DQS_c DQ[0] DQ[7:1] DQ[8] DQ[16] DQ[24] DQ[15:9] DQ[23:17] DQ[31:25] T0 T1 T2 T3 T4 T5 T6 T7 T8 x16 x32 Pattern “A” Pattern “B” RL = 3 tMRR = 2 CMD not allowed Optionally driven the same as DQ0 or to 0b Reg 32 Reg 32 Reg 40 Reg 40 MRR40 MRR32 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 tMRR = 2 Notes: 1. Mode Register Read has a burst length of four. 2. Mode Register Read operation shall not be interrupted. 3. Mode Register Reads to MR32 and MR40 drive valid data on DQ[0] during the entire burst. For x16 devices, DQ[8] shall drive the same information as DQ[0] during the burst. For x32 devices, DQ[8], DQ[16], and DQ[24] shall drive the same information as DQ[0] during the burst. 4. For x16 devices, DQ[7:1] and DQ[15:9] may optionally drive the same information as DQ[0] or they may drive 0b during the burst. For x32 devices, DQ[7:1], DQ[15:9], DQ[23:17], and DQ[31:25] may optionally drive the same information as DQ[0] or they may drive 0b during the burst. 5. The Mode Register Command period is tMRR. No command (other than Nop) is allowed during this period. |
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