W97AH6KB datasheet(81/127 Pages) WINBOND

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W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 81 -

8.2.4.1.2

Single-Ended AC and DC Input Levels for CKE

Symbol

Parameter

Min

Max

Unit

Note

VIHCKE

CKE Input High Level

0.8 * VDDCA

Note 1

VILCKE

CKE Input Low Level

Note 1

0.2 * VDDCA

Note 1: See section 8.2.5.5

“Overshoot and Undershoot Specifications”.

8.2.4.1.3

Single-Ended AC and DC Input Levels for DQ and DM

Symbol

Parameter

LPDDR2-1066/LPDDR2-800

Unit

Notes

Min

Max

VIHDQ(AC)

AC input logic high

Vref + 0.220

Note 2

1, 2

VILDQ(AC)

AC input logic low

Note 2

Vref - 0.220

1, 2

VIHDQ(DC)

DC input logic high

Vref + 0.130

VDDQ

VILDQ(DC)

DC input logic low

VSSQ

Vref - 0.130

VRefDQ(DC)

Reference Voltage for DQ, DM inputs

0.49 * VDDQ

0.51 * VDDQ

3, 4

Notes:

1. For DQ input only pins. Vref = VrefDQ(DC).

2. See section 8.2.5.5

“Overshoot and Undershoot Specifications”.

3. The ac peak noise on VRefDQ may not allow VRefDQ to deviate from VRefDQ(DC) by more than ± 1% VDDQ (for reference: approx.

±12 mV).

4. For reference: approx. VDDQ/2 ± 12 mV.

8.2.4.2

Vref Tolerances

The DC tolerance limits and ac-noise limits for the reference voltages VRefCA and VRefDQ are illustrated in below

“VRef(DC) Tolerance and VRef AC-Noise Limits” figure. It shows a valid reference voltage VRef(t) as a function of

time. (VRef stands for VRefCA and VRefDQ likewise). VDD stands for VDDCA for VRefCA and VDDQ for VRefDQ.

VRef(DC) is the linear average of VRef(t) over a very long period of time (e.g. 1 sec) and is specified as a fraction of

the linear average of VDDQ or VDDCA also over a very long period of time (e.g. 1 sec). This average has to meet the

min/max requirements in 8.2.4.1.1

“Single-Ended AC and DC Input Levels for CA and CS_n Inputs” table.

Furthermore VRef(t) may temporarily deviate from VRef(DC) by no more than ± 1% VDD. Vref(t) cannot track noise on

VDDQ or VDDCA if this would send Vref outside these specifications.

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