W97AH6KB datasheet(74/127 Pages) WINBOND

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W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 74 -

Notes:

All LPDDR2 commands are defined by states of CS_n, CA0, CA1, CA2, CA3, and CKE at the rising edge of the clock.

For LPDDR2 SDRAM, Bank addresses BA0, BA1, BA2 (BA) determine which bank is to be operated upon.

AP is significant only to SDRAM.

AP “high” during a READ or WRITE command indicates that an auto-precharge will occur to the bank associated with the READ or WRITE

command.

“X” means “H or L (but a defined logic level)”.

Self refresh exit and Deep Power Down exit are asynchronous.

VREF must be between 0 and VDDQ during Self Refresh and Deep Power Down operation.

CAxr refers to command/address bit “x” on the rising edge of clock.

CAxf refers to command/address bit “x” on the falling edge of clock.

10. CS_n and CKE are sampled at the rising edge of clock.

11. Per Bank Refresh is only allowed in devices with 8 banks.

12. The least-significant column address C0 is not transmitted on the CA bus, and is implied to be zero.

13.

AB “high”during Precharge command indicates that all bank Precharge will occur. In this case, Bank Address is do-not-care.

7.5.2

CKE Truth Table

Notes:

“CKEn” is the logic state of CKE at clock rising edge n; “CKEn-1” was the state of CKE at the previous clock edge.

“CS_n” is the logic state of CS_n at the clock rising edge n;

“Current state” is the state of the LPDDR2 device immediately prior to clock edge n.

“Command n” is the command registered at clock edge N, and “Operation n” is a result of “Command n”.

All states and sequences not shown are illegal or reserved unless explicitly described elsewhere in this document.

Power Down exit time (tXP) should elapse before a command other than NOP is issued.

Self-Refresh exit time (tXSR) should elapse before a command other than NOP is issued.

The Deep Power-Down exit procedure must be followed as discussed in the Deep Power-Down section of the Func tional Description.

The clock must toggle at least once during the tXP period.

10. The clock must toggle at least once during the tXSR time.

11.

X’ means ‘Don’t care’.

12. Upon exiting Resetting Power Down, the device will return to the Idle state if tINIT5 has expired.

Device Current State

CKEn-1

CKEn

CS_n

Command n

Operation n

Device Next State

Notes

Active Power Down

Maintain Active Power Down

Active Power Down

NOP

Exit Active Power Down

Active

6, 9

Idle Power Down

Maintain Idle Power Down

Idle Power Down

NOP

Exit Idle Power Down

Idle

6, 9

Resetting Power Down

Maintain

Resetting Power Down

Resetting

Power Down

NOP

Exit Resetting Power Down

Idle or Resetting

6, 9, 12

Deep Power Down

Maintain

Deep Power Down

NOP

Exit Deep Power Down

Power On

Self Refresh

Maintain Self Refresh

Self Refresh

NOP

Exit Self Refresh

Idle

7, 10

Bank(s) Active

NOP

Enter

Active Power Down

All Banks Idle

NOP

Enter

Idle Power Down

Idle Power Dow

Enter

Self Refresh

Enter

Self Refresh

Deep Power Down

Enter

Deep Power Down

Resetting

NOP

Enter

Resetting Power Down

Others states

Refer to the Command Truth Table

W97AH6KB Datasheet(PDF) 74 Page - Winbond

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