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W97AH6KB Datasheet(PDF) 79 Page - Winbond

Part # W97AH6KB
Description  Four-bit prefetch DDR architecture
PDF  127 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W97AH6KB Datasheet(HTML) 79 Page - Winbond

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W97AH6KB / W97AH2KB
Publication Release Date: May 15, 2014
Revision: A01-001
- 79 -
8.
ELECTRICAL CHARACTERISTIC
8.1
Absolute Maximum DC Ratings
Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
Parameter
Symbol
Min
Max
Units
Notes
VDD1 supply voltage relative to VSS
VDD1
-0.4
+2.3
V
2
VDD2 supply voltage relative to VSS
VDD2
-0.4
+1.6
V
2
VDDCA supply voltage relative to VSSCA
VDDCA
-0.4
+1.6
V
2, 4
VDDQ supply voltage relative to VSSQ
VDDQ
-0.4
+1.6
V
2, 3
Voltage on any ball relative to VSS
VIN, VOUT
-0.4
+1.6
V
Storage Temperature
TSTG
-55
+125
°C
5
Notes:
1.
Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2.
See “Power Ramp” in section 7.2.1 “Power Ramp and Device Initialization” for relationships between power supplies.
3.
VREFDQ
≤ 0.6 x VDDQ; however, VREFDQ may be ≥ VDDQ provided that VREFDQ ≤ 300mV.
4.
VREFCA
≤ 0.6 x VDDCA; however, VREFCA may be ≥ VDDCA provided that VREFCA ≤ 300mV.
5.
Storage Temperature is the case surface temperature on the center/top side of the LPDDR2 device. For the measurement conditions, please
refer to JESD51-2 standard.
8.2
AC & DC Operating Conditions
Operation or timing that is not specified is illegal, and after such an event, in order to guarantee proper operation, the
LPDDR2 Device must be powered down and then restarted through the specialized initialization sequence before
normal operation can continue.
8.2.1
Recommended DC Operating Conditions
8.2.1.1
Recommended DC Operating Conditions
Symbol
LPDDR2-S4B
DRAM
Unit
Min
Typ
Max
VDD1
1.70
1.80
1.95
Core Power1
V
VDD2
1.14
1.20
1.30
Core Power2
V
VDDCA
1.14
1.20
1.30
Input Buffer Power
V
VDDQ
1.14
1.20
1.30
I/O Buffer Power
V
Note: VDD1 uses significantly less power than VDD2.



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