W97AH6KB datasheet(18/127 Pages) WINBOND

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W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 18 -

7.2.4

Initialization after Reset (without Power ramp)

If the RESET command is issued outside the power up initialization sequence, the reinitialization procedure shall

begin with step 3 (Td).

7.2.5

Power-off Sequence

The following sequence shall be used to power off the LPDDR2 device.

While removing power, CKE shall be held at a logic low level (

≤ 0.2 x VDDCA), all other inputs shall be between

VILmin and VIHmax. The LPDDR2 device will only guarantee that outputs are in a high impedance state while CKE is

held low.

DQ, DM, DQS_t and DQS_c voltage levels must be between VSSQ and VDDQ during power off sequence to avoid

latch-up. CK_t, CK_c, CS_n and CA input levels must be between VSSCA and VDDCA during power off sequence to

avoid latch-up.

Tx is the point where any power supply decreases under its minimum value specified in 8.2.1.1

“Recommended DC

Operating Conditions

” table.

Tz is the point where all power supplies are below 300 mV. After Tz, the device is powered off.

The time between Tx and Tz (tPOFF) shall be less than 2s.

The following conditions apply:

Between Tx and Tz, VDD1 must be greater than VDD2 - 200 mV.

Between Tx and Tz, VDD1 and VDD2 must be greater than VDDCA - 200 mV.

Between Tx and Tz, VDD1 and VDD2 must be greater than VDDQ - 200 mV.

Between Tx and Tz, VREF must always be less than all other supply voltages.

The voltage difference between any of VSS, VSSQ, and VSSCA pins may not exceed 100 mV.

For supply and reference voltage operating conditions, see 8.2.1.1

“Recommended DC Operating Conditions”

table.

7.2.6

Timing Parameters Power-Off

Symbol

Value

Unit

Comment

min

max

tPOFF

Maximum Power-Off Ramp Time

7.2.7

Uncontrolled Power-Off Sequence

The following sequence shall be used to power off the LPDDR2 device under uncontrolled condition.

Tx is the point where any power supply decreases under its minimum value specified in the DC operating condition

table. After turning off all power supplies, any power supply current capacity must be zero, except for any static

charge remaining in the system.

Tz is the point where all power supply first reaches 300 mV. After Tz, the device is powered off.

The time between Tx and Tz (tPOFF) shall be less than 2s. The relative levels between supply voltages are

uncontrolled during this period.

VDD1 and VDD2 shall decrease with a slope lower than 0.5 V/µS between Tx and Tz.

Uncontrolled power off sequence can be applied only up to 400 times in the life of the device.

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