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W97AH6KB Datasheet(PDF) 98 Page - Winbond

Part # W97AH6KB
Description  Four-bit prefetch DDR architecture
PDF  127 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W97AH6KB Datasheet(HTML) 98 Page - Winbond

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W97AH6KB / W97AH2KB
Publication Release Date: May 15, 2014
Revision: A01-001
- 98 -
8.3
IDD Specification Parameters and Test Conditions
8.3.1
IDD Measurement Conditions
The following definitions are used within the IDD measurement tables:
LOW: VIN
≤ VIL(DC) MAX
HIGH: VIN
≥ VIH(DC) MIN
STABLE: Inputs are stable at a HIGH or LOW level
SWITCHING: See tables below.
8.3.1.1
Definition of Switching for CA Input Signals
Switching for CA
CK_t
(RISING) /
Ck_C
(FALLING)
CK_t
(FALLING) /
Ck_C
(RISING)
CK_t
(RISING) /
Ck_C
(FALLING)
CK_t
(FALLING) /
Ck_C
(RISING)
CK_t
(RISING) /
Ck_C
(FALLING)
CK_t
(FALLING) /
Ck_C
(RISING)
CK_t
(RISING) /
Ck_C
(FALLING)
CK_t
(FALLING) /
Ck_C
(RISING)
Cycle
N
N+1
N+2
N+3
CS_n
HIGH
HIGH
HIGH
HIGH
CA0
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
CA1
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
CA2
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
CA3
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
CA4
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
CA5
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
CA6
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
CA7
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
CA8
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
CA9
HIGH
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
Notes:
1. CS_n must always be driven HIGH.
2. 50% of CA bus is changing between HIGH and LOW once per clock for the CA bus.
3. The above pattern (N, N+1, N+2, N+3...) is used continuously during IDD measurement for IDD values that require SWITCHING on the CA bus.



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