W97AH6KB datasheet(119/127 Pages) WINBOND

119 / 127 page

W97AH6KB / W97AH2KB

Publication Release Date: May 15, 2014

Revision: A01-001

- 119 -

8.7.3

Data Setup, Hold and Slew Rate Derating

For all input signals (DQ, DM) the total tDS (setup time) and tDH (hold time) required is calculated by adding the data

sheet tDS(base) and tDH(base) value (see 8.7.3.1

“Data Setup and Hold Base-Values” table) to the ΔtDS and ΔtDH

(see 8.7.3.2

“Derating Values LPDDR2 tDS/tDH - AC/DC Based AC220” table) derating value respectively.

Example: tDS (total setup time) = tDS(base) +

ΔtDS.

Setup (tDS) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of VREF(dc) and

the first crossing of VIH(ac)min. Setup (tDS) nominal slew rate for a falling signal is defined as the slew rate between

the last crossing of VREF(dc) and the first crossing of VIL(ac)max (see 8.7.3.4

“Nominal Slew Rate and tVAC for

Setup Time tDS for DQ with Respect to Strobe

” figure). If the actual signal is always earlier than the nominal slew

rate l

ine between shaded ‘VREF(dc) to ac region’, use nominal slew rate for derating value. If the actual signal is later

than the nominal slew rate line anywhere between shaded ‘VREF(dc) to ac region’, the slew rate of a tangent line to

the actual signal from the ac level to dc level is used for derating value (see 8.7.3.6

“Tangent Line for Setup Time

tDS for DQ with Respect to Strobe

” figure).

Hold (tDH) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of VIL(dc)max and

the first crossing of VREF(dc). Hold (tDH) nominal slew rate for a falling sig5nal is defined as the slew rate between the

last crossing of VIH(dc)min and the first crossing of VREF(dc) (see 8.7.3.5

“Nominal Slew Rate for Hold time tDH for

DQ with Respect to Strobe

” figure). If the actual signal is always later than the nominal slew rate line between

shaded ‘dc level to VREF(dc) region’, use nominal slew rate for derating value. If the actual signal is earlier than the

nominal slew rate line anywhere between shaded ‘dc to VREF(dc) region’, the slew rate of a tangent line to the actual

signal from the dc level to VREF(dc) level is used for derating value (see 8.7.3.7

“Tangent Line for Hold Time tDH

for DQ with Respect to Strobe

” figure).

For a valid transition the input signal has to remain above/below VIH/IL(ac) for some time tVAC (see 8.7.3.3

“Required

Time tVAC above VIH(ac) {below VIL(ac)} for Valid Transition

” table).

Although for slow slew rates the total setup time might be negative (i.e. a valid input signal will not have reached

VIH/IL(ac) at the time of the rising clock transition) a valid input signal is still required to complete the transition and

reach VIH/IL(ac).

For slew rates in between the values listed in 8.7.3.2

“Derating Values LPDDR2 tDS/tDH - AC/DC Based AC220”

table, the derating values may obtained by linear interpolation. These values are typically not subject to production

test. They are verified by design and characterization.

8.7.3.1

Data Setup and Hold Base-Values

Unit [pS]

LPDDR2-1066

LPDDR2-800

reference

tDS(base)

-10

VIH/L(ac) = VREF(dc) ± 220mV

tDH(base)

140

VIH/L(dc) = VREF(dc) ± 130mV

Note: ac/dc referenced for 1V/nS DQ,DM slew rate and 2V/nS differential DQS_t-DQS_c slew rate.

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