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PM7345 Datasheet(PDF) 53 Page - PMC-Sierra, Inc |
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PM7345 Datasheet(HTML) 53 Page - PMC-Sierra, Inc |
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53 / 306 page ![]() PM7345 S/UNI-PDH DATA SHEET PMC-931011 ISSUE 6 SATURN USER-NETWORK INTERFACE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 39 A[7] A[6] A[5] A[4] A[3] A[2] A[1] A[0] Input Input Input Input Input Input Input Input 24 23 22 21 6 5 4 3 32 31 30 29 16 15 14 13 Address Bus (A[7:0]). The address bus (A[7:0) selects specific registers during accesses. VDDO[0] VDDO[1] VDDO[2] VDDO[3] Power Power Power Power 11 37 64 87 21 42 65 84 Pad Ring Power (VDDO[3:0]). These pins must be connected to a common, well decoupled +5 VDC supply together with the VDDI[2:0] pins. Care must be taken to avoid coupling noise induced on the VDDO pins into the VDDI pins. VDDI[0] VDDI[1] VDDI[2] Power Power Power 14 15 60 23 n/a 62 Core Power (VDDI[2:0]). These pins must be connected to a common, well decoupled +5 VDC supply together with the VDDO[3:0] pins. VSSO[0] VSSO[1] VSSO[2] VSSO[3] VSSO[4] Ground Ground Ground Ground Ground 16 38 63 85 75 24 43 64 83 n/a Pad Ring Ground (VSSO[4:0]). These pins must be connected to a common ground together with the VSSI[2:0] pins. Care must be taken to avoid coupling noise induced on the VSSO pins into the VSSI pins. VSSI[0] VSSI[1] VSSI[2] Ground Ground Ground 12 13 61 22 n/a 63 Core Ground (VSSI[2:0]). These pins must be connected to a common ground together with the VSSO[4:0] pins. Notes on Pin Description: 1. Most S/UNI-PDH inputs and bidirectionals present minimum capacitive loading and operate at TTL logic levels. The high speed inputs, RCLK, RPOS/RDAT, RNEG/ROHM, TICLK, C13/CADD, and TIOHM inputs operate at CMOS logic levels. The ALE, RSTB, TSEN, TDLSIG, TXPRTY, and SYFIFOB inputs have pullups. The RRDENB and TWRENB inputs have integral pull-down resistors. RSTB uses a schmitt trigger input. 2. The TCLK, TPOS/TDAT, TNEG/TOHM, RSOC, REOH, REOC, RFIFOE, TFIFOFB outputs, and the FRDATA[7:0] and RXPRTY tristate outputs have non slew-rate limited 2 mA drive capability. The D[7:0] bidirectionals and INTB have 4 mA slew-rate limited drive capability. All other S/UNI-PDH digital outputs have 2 mA slew-rate limited drive capability. |
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