PM7345 datasheet(79/306 Pages) PMC

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PM7345 S/UNI-PDH

DATA SHEET

PMC-931011

ISSUE 6

SATURN USER-NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

formatted stream. When a logic 1 is written to FRMRBP, the DS3 or E3

transceiver is held reset, and the S/UNI-PDH receives and transmits a non-

DS3/E3 formatted stream (for example a DS1 or E1 stream). When using

diagnostic loopback in framer bypass mode, received cell errors may result if the

E3 framer is enabled. Ensure that when FRMRBP is asserted that E3ENBL (in

this register) is not asserted.

LOOPT:

The LOOPT bit selects the transmit timing source. When a logic 1 is written to

LOOPT, the transmitter is loop-timed to the receiver. When loop timing is

enabled, the receive clock (RCLK) is used as the transmit timing source. The

transmit nibble stuffing is derived from the nibble stuffing in the receive PLCP

frame (for DS3 or E3 PLCP frame transmission). The FIXSTUFF bit must be set

to logic 0 if the LOOPT bit is set to logic 1. When a logic 0 is written to LOOPT,

the transmit clock (TICLK) is used as the transmit timing source. The nibble

stuffing is derived from the C13/CADD input, or is fixed internally (as determined

by the FIXSTUFF bit in the SPLT Configuration Register (for DS3 or E3 PLCP

frame transmission only). Setting the LOOPT bit disables the effect of the TICLK

bit in the S/UNI-PDH Control register, thereby forcing flow-through timing. The

LOOPT mode is not available when the S/UNI-PDH is used for E1 ATM direct-

mapped applications. When the S/UNI-PDH is operating in DS-3 mode (E3ENBL

=0) AND loop timing is enabled (LOOPT =1) then the FORMAT[0:1] bits in

occur.

FIFOBP:

The FIFOBP bit controls the bypassing of the receive and transmit FIFOs. When

a logic 1 is written to FIFOBP, the receive and transmit FIFOs are bypassed,

thereby minimizing the latency through the S/UNI-PDH. Note that the FIFOs may

be bypassed only when PLCP formatted transmission frames (DS3, DS1, G.751

E3, or E1) are processed. When a logic 0 is written to FIFOBP, the receive and

transmit FIFOs operate normally, and both PLCP based and non-PLCP based

transmission frames may be processed

E3ENBL:

The E3ENBL bit controls which of the two transceivers is used for the

transmission system sublayer. When a logic 1 is written to E3ENBL, the

T3-FRMR and T3-TRAN are held reset and the E3-FRMR and E3-TRAN are

enabled to source and sink G.751 or G.832 formatted E3 streams. When a logic

0 is written to E3ENBL, the E3-FRMR and E3-TRAN are held reset and the

T3-FRMR and T3-TRAN are enable to source and sink DS3 formatted streams.

PM7345 Datasheet(PDF) 79 Page - PMC-Sierra, Inc

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