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DM504 Datasheet(PDF) 139 Page - Texas Instruments |
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DM504 Datasheet(HTML) 139 Page - Texas Instruments |
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139 / 211 page  5 6 8 7 TCK RTCK SPRS91v_JTAG_02 3 TCK TDO TDI/TMS 2 4 1 1a 1b SPRS91v_JTAG_01 139 DM504 www.ti.com SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017 Submit Documentation Feedback Specifications Copyright © 2016–2017, Texas Instruments Incorporated Figure 5-41. JTAG Timing Table 5-74, Table 5-75 and Figure 5-42 assumes testing over the recommended operating conditions and electrical characteristic conditions below. Table 5-74. Timing Requirements for IEEE 1149.1 JTAG With RTCK NO. PARAMETER DESCRIPTION MIN MAX UNIT 1 tc(TCK) Cycle time, TCK 62.29 ns 1a tw(TCKH) Pulse duration, TCK high (40% of tc) 24.92 ns 1b tw(TCKL) Pulse duration, TCK low(40% of tc) 24.92 ns 3 tsu(TDI-TCK) Input setup time, TDI valid to TCK high 6.23 ns tsu(TMS-TCK) Input setup time, TMS valid to TCK high 6.23 ns 4 th(TCK-TDI) Input hold time, TDI valid from TCK high 31.15 ns th(TCK-TMS) Input hold time, TMS valid from TCK high 31.15 ns Table 5-75. Switching Characteristics Over Recommended Operating Conditions for IEEE 1149.1 JTAG With RTCK NO. PARAMETER DESCRIPTION MIN MAX UNIT 5 td(TCK-RTCK) Delay time, TCK to RTCK with no selected subpaths (i.e. ICEPick is the only tap selected - when the ARM is in the scan chain, the delay time is a function of the ARM functional clock). 0 27 ns 6 tc(RTCK) Cycle time, RTCK 62.29 ns 7 tw(RTCKH) Pulse duration, RTCK high (40% of tc) 24.92 ns 8 tw(RTCKL) Pulse duration, RTCK low (40% of tc) 24.92 ns Figure 5-42. JTAG With RTCK Timing |
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