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DM504 Datasheet(PDF) 138 Page - Texas Instruments

Part # DM504
Description  SoC for Vision Analytics 12mm Package (ABE) Silicon Revision 2.0
PDF  211 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DM504 Datasheet(HTML) 138 Page - Texas Instruments

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DM504
SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017
www.ti.com
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Specifications
Copyright © 2016–2017, Texas Instruments Incorporated
Table 5-71. GPIO2/3/4 IOSETs (continued)
SIGNALS
IOSET1
IOSET2
BALL
MUX
BALL
MUX
GPIO3
gpio3_0
T10
14
gpio3_9
T6
14
T6
14
gpio3_10
U6
14
U6
14
gpio3_11
R6
14
R6
14
gpio3_12
T5
14
T5
14
gpio3_13
R5
14
R5
14
gpio3_14
U4
14
U4
14
gpio3_15
T4
14
gpio3_16
U3
14
GPIO4
gpio4_4
N2
14
gpio4_6
M3
14
gpio4_7
L2
14
gpio4_8
L3
14
gpio4_9
M1
14
gpio4_10
L1
14
5.9.7
Emulation and Debug Subsystem
The Device includes the following Test interfaces:
•
IEEE 1149.1 Standard-Test-Access Port (JTAG)
•
Compact JTAG Interface (cJTAG)
•
Trace Port Interface Unit (TPIU)
5.9.7.1
JTAG Electrical Data/Timing
Table 5-72, Table 5-73 and Figure 5-41 assumes testing over the recommended operating conditions and
electrical characteristic conditions below.
Table 5-72. Timing Requirements for IEEE 1149.1 JTAG
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
1
tc(TCK)
Cycle time, TCK
62.29
ns
1a
tw(TCKH)
Pulse duration, TCK high (40% of tc)
24.92
ns
1b
tw(TCKL)
Pulse duration, TCK low(40% of tc)
24.92
ns
3
tsu(TDI-TCK)
Input setup time, TDI valid to TCK high
6.23
ns
tsu(TMS-TCK)
Input setup time, TMS valid to TCK high
6.23
ns
4
th(TCK-TDI)
Input hold time, TDI valid from TCK high
31.15
ns
th(TCK-TMS)
Input hold time, TMS valid from TCK high
31.15
ns
Table 5-73. Switching Characteristics Over Recommended Operating Conditions for IEEE 1149.1 JTAG
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
2
td(TCKL-TDOV)
Delay time, TCK low to TDO valid
0
30.5
ns



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