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DM504 Datasheet(PDF) 134 Page - Texas Instruments |
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DM504 Datasheet(HTML) 134 Page - Texas Instruments |
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134 / 211 page ![]() mmc_clk mmc_cmd mmc_dat[3:0] HS1 HS2L HS2H HS5 HS6 HS5 HS6 SPRS91v_MMC_04 mmc_clk mmc_cmd mmc_dat[3:0] HS1 HS2L HS2H HS3 HS4 HS7 HS8 SPRS91v_MMC_03 134 DM504 SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017 www.ti.com Submit Documentation Feedback Specifications Copyright © 2016–2017, Texas Instruments Incorporated (1) i in [i:0] = 3 Table 5-65. Switching Characteristics for MMC - SD/SDIO High Speed Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT HS1 fop(clk) Operating frequency, mmc_clk 48 MHz HS2H tw(clkH) Pulse duration, mmc_clk high 0.5*P- 0.270 ns HS2L tw(clkL) Pulse duration, mmc_clk low 0.5*P- 0.270 ns HS5 td(clkL-cmdV) Delay time, mmc_clk falling clock edge to mmc_cmd transition -7.6 3.6 ns HS6 td(clkL-dV) Delay time, mmc_clk falling clock edge to mmc_dat[i:0] transition -7.6 3.6 ns (1) P = output mmc_clk period in ns (2) i in [i:0] = 3 Figure 5-35. MMC/SD/SDIOj in - High Speed - Receiver Mode Figure 5-36. MMC/SD/SDIOj in - High Speed - Transmiter Mode 5.9.6.14.3 MMC, SD and SDIO SDR12 Mode Figure 5-37, Figure 5-38, Table 5-66, and Table 5-67 present Timing requirements and Switching characteristics for MMC - SD and SDIO SDR12 in receiver and transmiter mode. Table 5-66. Timing Requirements for MMC - SDR12 Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR125 tsu(cmdV-clkH) Setup time, mmc_cmd valid before mmc_clk rising clock edge 25.99 ns SDR126 th(clkH-cmdV) Hold time, mmc_cmd valid after mmc_clk rising clock edge 1.6 ns SDR127 tsu(dV-clkH) Setup time, mmc_dat[i:0] valid before mmc_clk rising clock edge 25.99 ns SDR128 th(clkH-dV) Hold time, mmc_dat[i:0] valid after mmc_clk rising clock edge 1.6 ns |
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