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ELANSC520 Datasheet(PDF) 133 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 133 Page - Advanced Micro Devices |
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133 / 440 page ![]() Élan™SC520 Microcontroller Register Set Manual 11-1 CHAPTER 11 GP DMA CONTROLLER REGISTERS 11.1 OVERVIEW This chapter describes the general-purpose bus direct-memory access (GP bus DMA) registers of the ÉlanSC520 microcontroller. The ÉlanSC520 microcontroller’s GP DMA controller consists of two cascaded DMA controller devices that provide a total of seven independent channels. Channels 0–3 are on the slave controller device, and Channels 5–7 are on the master controller device. (Channel 4 is used for cascading the two devices.) The GP bus DMA register set includes two groups of registers: s 35 memory-mapped configuration region (MMCR) registers are used to specify the extended page address and the operation of each channel in the enhanced mode. s 52 direct-mapped I/O registers are used to configure the operation of each DMA controller device (master and slave) within the DMA controller, and to set up the memory address and transfer count for each channel. See the Élan™SC520 Microcontroller User’s Manual, order #22004, for details about the GP bus DMA controller. Table 11-1 and Table 11-2 list each type of GP bus DMA register in offset order, with the corresponding description’s page number. 11.2 REGISTERS Table 11-1 GP-DMA MMCR Registers Register Name Mnemonic MMCR Offset Page Number GP-DMA Control GPDMACTL D80h page 11-4 GP-DMA Memory-Mapped I/O GPDMAMMIO D81h page 11-5 GP-DMA Resource Channel Map A GPDMAEXTCHMAPA D82h page 11-6 GP-DMA Resource Channel Map B GPDMAEXTCHMAPB D84h page 11-8 GP-DMA Channel 0 Extended Page GPDMAEXTPG0 D86h page 11-10 GP-DMA Channel 1 Extended Page GPDMAEXTPG1 D87h page 11-11 GP-DMA Channel 2 Extended Page GPDMAEXTPG2 D88h page 11-12 GP-DMA Channel 3 Extended Page GPDMAEXTPG3 D89h page 11-13 GP-DMA Channel 5 Extended Page GPDMAEXTPG5 D8Ah page 11-14 GP-DMA Channel 6 Extended Page GPDMAEXTPG6 D8Bh page 11-15 GP-DMA Channel 7 Extended Page GPDMAEXTPG7 D8Ch page 11-16 GP-DMA Channel 3 Extended Transfer Count GPDMAEXTTC3 D90h page 11-17 GP-DMA Channel 5 Extended Transfer Count GPDMAEXTTC5 D91h page 11-18 |
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