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AD9554 Datasheet(PDF) 71 Page - Analog Devices

Part # AD9554
Description  Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  116 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9554 Datasheet(HTML) 71 Page - Analog Devices

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Data Sheet
AD9554
Rev. D | Page 71 of 116
CLOCK PART FAMILY ID (REGISTER 0x0003 TO REGISTER 0x0006)
Table 35. Clock Part Family ID
Address
Bits
Bit Name
Description
0x0003
[7:4]
Reserved
Reserved.
[3:0]
Chip type, Bits[3:0]
The Analog Devices unified SPI protocol reserves this read only register location for
identifying the type of device. The default value of 0x05 identifies the AD9554 as a clock IC.
0x0004
[7:4]
Clock part serial ID, Bits[3:0]
The Analog Devices unified SPI protocol reserves this read only register location as the
lower four bits of the clock part serial ID that (along with Register 0x0005) uniquely
identifies the AD9554 within the Analog Devices clock chip family. No other Analog
Devices chip that adheres to the Analog Devices unified SPI has these values for Register
0x0003, Register 0x0004, and Register 0x0005. Default: 0x9F.
[3:0]
Reserved
Default: 0xF.
0x0005
[7:0]
Clock part serial ID,
Bits[11:4]
The Analog Devices unified SPI protocol reserves this read only register location as the
upper eight bits of the clock part serial ID that (along with Register 0x0004) uniquely
identifies the AD9554 within the Analog Devices clock chip family. No other Analog
Devices chip that adheres to the Analog Devices unified SPI has these values for Register
0x0003, Register 0x0004, and Register 0x0005. Default: 0x00.
0x0006
[7:0]
Part version, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for
identifying the die revision. Default: 0x05.
SPI VERSION (REGISTER 0x000B)
Table 36. SPI Version
Address
Bits
Bit Name
Description
0x000B
[7:0]
SPI version, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for identifying
the version of the unified SPI protocol. Default: 0x00.
VENDOR ID (REGISTER 0x000C TO REGISTER 0x000D)
Table 37. Vendor ID
Address
Bits
Bit Name
Description
0x000C
[7:0]
Vendor ID, Bits[7:0]
The Analog Devices unified SPI protocol reserves this read only register location for identifying
Analog Devices as the chip vendor of this device. All Analog Devices devices adhering to the
unified serial port specification have the same value in this register. Default: 0x56.
0x000D
[7:0]
Vendor ID, Bits[15:8]
The Analog Devices unified SPI protocol reserves this read only register location for identifying
Analog Devices as the chip vendor of this device. All Analog Devices devices adhering to the
unified serial port specification have the same value in this register. Default: 0x04.
IO_UPDATE (REGISTER 0x000F)
Table 38. IO_UPDATE
Address
Bits
Bit Name
Description
0x000F
[7:1]
Reserved
Reserved. Default: 0000000b
0
IO_UPDATE
Writing a 1 to this bit transfers the data in the serial input/output buffer registers to the
internal control registers of the device. This is an autoclearing bit.
USER SCRATCHPAD (REGISTER 0x00FE TO REGISTER 0x00FF)
Table 39. User Scratchpad
Address
Bits
Bit Name
Description
0x00FE
[7:0]
User scratchpad, Bits[7:0]
This register has no effect on device operation. It is available for serial port debugging or
register setting revision control. Default: 0x00.
0x00FF
[7:0]
User scratchpad, Bits[15:8]
This register has no effect on device operation. It is available for serial port debugging or
register setting revision control. Default: 0x00.



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