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AD9554 Datasheet(PDF) 92 Page - Analog Devices

Part # AD9554
Description  Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  116 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9554 Datasheet(HTML) 92 Page - Analog Devices

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AD9554
Data Sheet
Rev. D | Page 92 of 116
IRQ CLEARING (REGISTER 0x0A05 TO REGISTER 0x0A14)
The IRQ clearing registers are identical in format to the IRQ monitor registers (Register 0x0D08 to Register 0x0A14). When set to Logic
1, an IRQ clearing bit resets the corresponding IRQ monitor bit, thereby cancelling the interrupt request for the indicated event. The IRQ
clearing registers are autoclearing.
Table 103. Clear IRQ Groups
Address
Bits
Bit Name
Description
0x0A05
7
Clear watchdog timer
Clears watchdog timer alert
6
Reserved
Reserved
5
Clear DPLL_3 IRQs
Clears all IRQs associated with DPLL_3
4
Clear DPLL_2 IRQs
Clears all IRQs associated with DPLL_2
3
Clear DPLL_1 IRQs
Clears all IRQs associated with DPLL_1
2
Clear DPLL_0 IRQs
Clears all IRQs associated with DPLL_0
1
Clear common IRQs
Clears all IRQs associated with common IRQ group
0
Clear all IRQs
Clears all IRQs
Table 104. IRQ Clearing for SYSCLK and EEPROM
Address
Bits
Bit Name
Description
0x0A06
7
SYSCLK unlocked
Clears IRQ indicating a SYSCLK PLL state transition from locked to unlocked
6
SYSCLK stable
Clears IRQ indicating that SYSCLK stability time has expired and that the SYSCLK PLL is
considered to be stable
5
SYSCLK locked
Clears IRQ indicating a SYSCLK PLL state transition from unlocked to locked
4
SYSCLK cal ended
Clears IRQ indicating a SYSCLK PLL calibration has ended
3
SYSCLK cal started
Clears IRQ indicating a SYSCLK PLL calibration has started
2
Watchdog timer
Clears IRQ indicating expiration of the watchdog timer
1
EEPROM fault
Clears IRQ indicating a fault during an EEPROM upload or download operation
0
EEPROM complete
Clears IRQ indicating successful completion of an EEPROM upload or download operation
Table 105. IRQ Clearing for Reference Inputs
Address
Bits
Bit Name
Description
0x0A07
7
Reserved
Reserved
6
REFB validated
Clears IRQ indicating that REFB has been validated
5
REFB fault cleared
Clears IRQ indicating that REFB has been cleared of a previous fault
4
REFB fault
Clears IRQ indicating that REFB has been faulted
3
Reserved
Reserved
2
REFA validated
Clears IRQ indicating that REFA has been validated
1
REFA fault cleared
Clears IRQ indicating that REFA has been cleared of a previous fault
0
REFA fault
Clears IRQ indicating that REFA has been faulted
0x0A08
7
Reserved
Reserved
6
REFD validated
Clears IRQ indicating that REFD has been validated
5
REFD fault cleared
Clears IRQ indicating that REFD has been cleared of a previous fault
4
REFD fault
Clears IRQ indicating that REFD has been faulted
3
Reserved
Reserved
2
REFC validated
Clears IRQ indicating that REFC has been validated
1
REFC fault cleared
Clears IRQ indicating that REFC has been cleared of a previous fault
0
REFC fault
Clears IRQ indicating that REFC has been faulted



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