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AD9554 Datasheet(PDF) 22 Page - Analog Devices

Part # AD9554
Description  Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
PDF  116 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9554 Datasheet(HTML) 22 Page - Analog Devices

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AD9554
Data Sheet
Rev. D | Page 22 of 116
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
FREQUENCY OFFSET (Hz)
1k
10
100
10k
100k
1M
10M
100M
INTEGRATED RMS JITTER
(12kHz TO 20MHz): 408fs
PHASE NOISE (dBc/Hz):
OFFSET
LEVEL
10Hz
–79
100Hz
–82
1kHz
–110
10kHz
–127
100kHz
–131
1MHz
–141
10MHz
–153
FLOOR
–154
Figure 9. Absolute Phase Noise (Output Driver = 14 mA Mode), fR = 2 kHz,
fOUT = 125 MHz, DPLL Loop Bandwidth = 100 Hz, fSYS = 49.152 MHz Crystal
0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1000
900
800
700
600
500
400
300
200
100
WITH 100Ω TERMINATION RESISTOR (REQUIRED)
OUTPUT FREQUENCY (MHz)
Figure 10. Peak-to-Peak Differential Amplitude vs. Output Frequency, 28 mA
Mode (LVPECL-Compatible Mode) with 100 Ω Termination Resistor (Required)
0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1000
900
800
700
600
500
400
300
200
100
OUTPUT FREQUENCY (MHz)
NO TERMINATION RESISTOR (HCSL)
100Ω TERMINATION (LVDS COMPATIBLE)
Figure 11. Peak-to-Peak Differential Amplitude vs. Output Frequency,
14 mA Mode
0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
OUTPUT FREQUENCY (MHz)
0
100
200
300
400
500
600
700
800
900 1000
SINGLE-ENDED, NO TERMINATION
Figure 12. Single-Ended Peak-to-Peak Amplitude vs. Output Frequency,
21 mA Mode (No Termination)
0
3.0
2.5
2.0
1.5
1.0
0.5
0
1000
900
800
700
600
500
400
300
200
100
OUTPUT FREQUENCY (MHz)
NO TERMINATION RESISTOR
100Ω TERMINATION RESISTOR
Figure 13. Peak-to-Peak Differential Amplitude vs. Output Frequency,
21 mA Mode
–1.0
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
05
4
3
2
1
TIME (ns)
Figure 14. Output Waveform, 28 mA LVPECL-Compatible Mode (400 MHz)
with 100 Ω Termination Resistor



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