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Low Battery Detect (LBD) - Low Voltage Reset
PRELIMINARY V1.8
111
Figure 44.
Low Battery Detect Block Diagram
19.3.
Low Battery Detect, Low Voltage Reset Control Register
Address
84H
Bit Address
BIT
7
6
5
4
3210
NAME
TST
cmp_out
an_enb
lvs1
lvs0
enable
Definition
test
mode
test mode
comparator
output
i/o pad
analog
input
enable
level select
bit-1
level select
bit-0
1-enable
Reset Value
0
0
0
0
0000
+
Comparator
VREF
Control Register
Resistor
Mode Control
Enable
LBD_INT
LV_RST
Output
Mux
Logic
LBDCR
VDD
CLK
or
Battery
EN
Bandgap Reference
Voltage Generator
Level
Select
Network