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4559 Datasheet(PDF) 56 Page - Renesas Technology Corp |
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4559 Datasheet(HTML) 56 Page - Renesas Technology Corp |
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56 / 148 page ![]() Rev.1.04 Aug 23, 2007 Page 56 of 146 REJ03B0188-0104 4559 Group (6) Return signal An external wakeup signal or timer 3 interrupt request flag (T3F) is used to return from the clock operating mode. An external wakeup signal is used to return from the RAM back- up mode because the oscillation is stopped. Table 24 shows the return condition for each return source. (7) Control registers • Key-on wakeup control register K0 Register K0 controls the ports P0 and P1 key-on wakeup function. Set the contents of this register through register A with the TK0A instruction. In addition, the TAK0 instruction can be used to transfer the contents of register K0 to register A. • Key-on wakeup control register K1 Register K1 controls the return condition and the selection of valid waveform/level of port P1. Set the contents of this register through register A with the TK1A instruction. In addition, the TAK1 instruction can be used to transfer the contents of register K0 to register A. • Key-on wakeup control register K2 Register K2 controls the port P3 and INT pin key-on wakeup function and the selection of return condition of INT pin. Set the contents of this register through register A with the TK2A instruction. In addition, the TAK2 instruction can be used to transfer the contents of register K2 to register A. • Key-on wakeup control register K3 Register K3 controls the selection of return condition and valid waveform/level of port P3. Set the contents of this register through register A with the TK3A instruction. In addition, the TAK3 instruction can be used to transfer the contents of register K3 to register A. • Pull-up control register PU0 Register PU0 controls the ON/OFF of the port P0 pull-up transistor. Set the contents of this register through register A with the TPU0A instruction. In addition, the TAPU0 instruction can be used to transfer the contents of register PU0 to register A. • Pull-up control register PU1 Register PU1 controls the ON/OFF of the port P1 pull-up transistor. Set the contents of this register through register A with the TPU1A instruction. In addition, the TAPU1 instruction can be used to transfer the contents of register PU1 to register A. • Pull-up control register PU2 Register PU2 controls the ON/OFF of the ports P2 pull-up transistor. Set the contents of this register through register A with the TPU2A instruction. In addition, the TAPU2 instruction can be used to transfer the contents of register PU2 to register A. • Pull-up control register PU3 Register PU3 controls the ON/OFF of the ports P3 pull-up transistor. Set the contents of this register through register A with the TPU3A instruction. In addition, the TAPU3 instruction can be used to transfer the contents of register PU3 to register A. • External interrupt control register I1 Register I1 controls the input control and the selection of valid waveform/level of INT pin. Set the contents of this register through register A with the TI1A instruction. In addition, the TAI1 instruction can be used to transfer the contents of register I1 to register A. Table 24 Return source and return condition Return source Return condition Remarks Ports P00 −P03 Ports P10 −P13 Ports P20 −P23 Return by an external falling edge (“H” → “L”). For ports P0 and P1, the key-on wakeup function can be selected by two port unit, for port P2, it can be selected by a unit. Ports P30 −P33 Return by an external “H” level or “L” level input, or rising edge (“L” → “H”) or falling edge (“H” → “L”). Return by an external “L” level input, The key-on wakeup function can be selected by two port unit. Select the return level (“L” level or “H” level) and return condition (return by level or edge) with register K3 according to the external state before going into the power down state. INT pin Return by an external “H” level or “L” level input, or rising edge (“L” → “H”) or falling edge (“H” → “L”). When the return level is input, the interrupt request flag (EXF0) is not set. Select the return level (“L” level or “H” level) with register I1 and return condition (return by level or edge) with register K2 according to the external state before going into the power down state. Timer 3 interrupt request flag (T3F) Return by timer 3 underflow or by setting T3F to “1”. It can be used in the clock operating mode. Clear T3F with the SNZT3 instruction before system enters into the power down state. When system enters into the power down state while T3F is “1”, system returns from the state immediately because it is recognized as return condition. |
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