4559 datasheet(71/148 Pages) RENESAS

71 / 148 page

Rev.1.04

Aug 23, 2007

Page 71 of 146

REJ03B0188-0104

4559 Group

(20)Watchdog timer

• The watchdog timer function is valid after system is released

from reset. When not using the watchdog timer function,

execute the DWDT instruction and the WRST instruction

continuously, and clear the WEF flag to “0” to stop the

watchdog timer function.

• The contents of WDF1 flag and timer WDT are initialized at

the power down.

• When using the watchdog timer and the power down, initialize

the WDF1 flag with the WRST instruction just before the

microcomputer enters the power down mode.

Also, set the NOP instruction after the WRST instruction, for

the case when a skip is performed with the WRST instruction.

(21)Voltage drop detection circuit

The voltage drop detection circuit detection voltage of this

product is set up lower than the minimum value of the supply

voltage of the recommended operating conditions.

When the supply voltage of a microcomputer falls below to the

minimum value of recommended operating conditions and

regoes up (ex. battery exchange of an application product),

depending on the capacity value of the bypass capacitor added to

the power supply pin, the following case may cause program

failure (Figure 73);

supply voltage does not fall below to VRST-, and its voltage re-

goes up with no reset.

In such a case, please design a system which supply voltage is

once reduced below to VRST- and re-goes up after that.

Fig 73. VDD and VRST-

(22)On-chip oscillator

The clock frequency of the on-chip oscillator depends on the

supply voltage and the operation temperature range.

Be careful that variable frequencies when designing application

products.

Also, the oscillation stabilize wait time after system is released

from reset is generated by the on-chip oscillator clock. When

considering the oscillation stabilize wait time after system is

released from reset, be careful that the variable frequency of the

on-chip oscillator clock.

(23)RC oscillation

The CRCK instruction can be executed only once after reset

release.

Execute the CRCK instruction in the initial setting routine

(executing it in address 0 in page 0 is recommended).

The frequency is affected by a capacitor, a resistor and a

microcomputer.

So, set the constants within the range of the frequency limits.

(24)External clock

Be careful that the maximum value of the oscillation frequency

when using the external clock differs from the value when using

the ceramic resonator (refer to the recommended operating

condition).

Also, note that the power-down mode (POF or POF2 instruction)

cannot be used when using the external clock.

(25)QzROM

(1) Be careful not to apply overvoltage to MCU. The contents

of QzROM may be overwritten because of overvoltage.

Take care especially at turning on the power.

(2) As for the product shipped in blank, Renesas does not

perform the writing test to user ROM area after the

assembly process though the QzROM writing test is

performed enough before the assembly process. Therefore, a

writing error of approx. 0.1 % may occur. Moreover, please

note the contact of cables and foreign bodies on a socket,

etc. because a writing environment may cause some writing

errors.

(26)Notes On ROM Code Protect (QzROM product

shipped after writing)

As for the QzROM product shipped after writing, the ROM code

protect is specified according to the ROM option setup data in

the mask file which is submitted at ordering.

The ROM option setup data in the mask file is “0016” for protect

enabled or “FF16” for protect disabled.

Note that the mask file which has nothing at the ROM option

data or has the data other than “0016” and “FF16” can not be

accepted.

(27)Data Required for QzROM Writing Orders

The following are necessary when ordering a QzROM product

shipped after writing:

1. QzROM Writing Confirmation Form*

2. Mark Specification Form*

3. ROM data...........Mask file

* For the QzROM writing confirmation form and the mark

specification form, refer to the “Renesas Technology Corp.”

Homepage (http://www.renesas.com/homepage.jsp).

Note that we cannot deal with special font marking (customer’s

trademark etc.) in QzROM microcomputer.

VDD

VRST+

VRST-

Recommended operating

condition min. value

VDD

VRST+

VRST-

Normal operation

Reset

No reset

Program failure may occur.

Recommended operating

condition min. value

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